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Mapping affine loop nests: New results

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High-Performance Computing and Networking (HPCN-Europe 1995)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 919))

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Abstract

This paper deals with the problem of aligning data and computations when mapping affine loop nests onto distributed memory parallel computers. We formulate the problem by introducing a new graph, the access graph, to model affine communications (with rectangular access matrices) more adequately than in previous literature.

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Author information

Authors and Affiliations

  1. Laboratoire LIP, CNRS (U.R.A. nℴ 1398) Ecole Normale Supérieure de Lyon, 69364, Lyon Cedex 07, France

    Michèle Dion & Yves Robert

Authors
  1. Michèle Dion
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  2. Yves Robert
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Editor information

Bob Hertzberger Giuseppe Serazzi

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© 1995 Springer-Verlag Berlin Heidelberg

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Dion, M., Robert, Y. (1995). Mapping affine loop nests: New results. In: Hertzberger, B., Serazzi, G. (eds) High-Performance Computing and Networking. HPCN-Europe 1995. Lecture Notes in Computer Science, vol 919. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0046628

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  • DOI: https://doi.org/10.1007/BFb0046628

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-59393-5

  • Online ISBN: 978-3-540-49242-9

  • eBook Packages: Springer Book Archive

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