Abstract
PRAMs with faults in their shared memory are investigated. Efficient general simulations on such machines of algorithms designed for fully reliable PRAMs are developed.
The PRAM we work with is the Concurrent-Read Concurrent-Write (CRCW) variant. Two possible settings for error occurrence are considered: the errors may be either static (once a memory cell is checked to be operational it remains so during the computation) or dynamic (a potentially faulty cell may crash at any time, the total number of such cells being bounded). A simulation consists of two phases: memory formatting and the proper part done in a step-by-step way. For each error setting (static or dynamic), two simulations are presented: one with a O(1)-time per-step cost, the other with a O(log n)-time per-step cost. The other parameters of these simulations (number of processors, memory size, formatting time) are shown in table 1 in section 6. The simulations are randomized and Monte Carlo: they always operate within the given time bounds, and are guaranteed to be correct with a large probability.
This research was partially supported by EC Cooperative Action IC-1000 (project ALTEC: Algorithms for Future Technologies).
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© 1994 Springer-Verlag Berlin Heidelberg
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Chlebus, B.S., Gambin, A., Indyk, P. (1994). PRAM computations resilient to memory faults. In: van Leeuwen, J. (eds) Algorithms — ESA '94. ESA 1994. Lecture Notes in Computer Science, vol 855. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0049426
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DOI: https://doi.org/10.1007/BFb0049426
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