Abstract
New design methods and tools are needed to improve the process of designing dynamically reconfigurable logic. This paper reports on the revision and extension of Dynamic Circuit Switching (DCS), a CAD tool for specifying and simulating dynamically reconfigurable systems. The work introduces a new design framework, which exploits existing design practices where feasible, and proposes a new design flow for reconfigurable logic.
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References
Lysaght, P., Stockwood, J.: A Simulation Tool for Dynamically Reconfigurable Field Programmable Gate Arrays. In: IEEE Transactions on VLSI Systems, Sept 1996
McGregor, G., Lysaght, P.: Extending Dynamic Circuit Switching to Meet the Challenges of New FPGA Architectures. In: Field Programmable Logic and Applications, pp 31–40, Luk, W., Cheung, P., & Glesner, M. (Eds) 1997
Kwiat, K., Debany, W.: Reconfigurable Logic Modelling. Integrated System Design, December 1996 (www.isdmag.com)
McGregor, G., Robinson, D., Lysaght, P.: Hardware/Software Co-design Environment for Reconfigurable Logic Systems. ibid
Lysaght, P.: Towards an Expert System for a priori Estimation of Reconfiguration Latency in Dynamically Reconfigurable Logic. In: Field Programmable Logic and Applications, pp 183–192, Luk, W., Cheung, P., & Glesner, M. (Eds) 1997
Ohm, S. Y., Kurdahi, F. J., Dutt, N., Xu, M.: A Comprehensive Estimation Technique for High-Level Synthesis. In: Proceeding of 8th International Symposium on System Synthesis, 1995.
Xu, M., Kurdahi, F.: ChipEst-FPGA: A Tool for Chip Level Area and Timing Estimation of Lookup Table Based FPGAs for High Level Applications. In: Proceeding of Asia and South Pacific Design Automation Conference, 1997.
Nemani, M., Najm, F.: High-Level Area Prediction for Power Estimation. Custom Integrated Circuits Conference, 1997
De Micheli, G.: Synthesis and Optimization of Digital Circuits, pp155–158, McGraw Hill, 1994
Hadley, J. D., Hutchings, B. L.: Design Methodologies for Partially Reconfigured Systems. In: Peter Athanas and Kenneth L. Pocek, editors. Proceedings of the IEEE Workshop on FPGAs for Custom Computing Machines, pages 78–84, Los Alamitos, California, April 1995. IEEE Computer Society, IEEE Computer Society Press.
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© 1998 Springer-Verlag Berlin Heidelberg
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Robinson, D., McGregor, G., Lysaght, P. (1998). New CAD framework extends simulation of dynamically reconfigurable logic. In: Hartenstein, R.W., Keevallik, A. (eds) Field-Programmable Logic and Applications From FPGAs to Computing Paradigm. FPL 1998. Lecture Notes in Computer Science, vol 1482. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0055227
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DOI: https://doi.org/10.1007/BFb0055227
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