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Integrated development environment for logic synthesis based on dynamically reconfigurable FPGAs

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Field-Programmable Logic and Applications From FPGAs to Computing Paradigm (FPL 1998)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1482))

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Abstract

The paper discusses the models, methods and software tools included in an Integrated Design Environment for Logic Synthesis (IDELS) that has been developed in Visual C++ and can be used for PC computers running under Windows 95/98. It is able to solve a range of problems related to the design of digital systems and their components based on dynamically reconfigurable FPGAs of the XC6200 family. The paper focuses primarily on the integrated features, the basic capabilities and the main packages of the environment itself, rather than the details of how it was implemented. However, the basic ideas behind the methods used, and some of the approaches to implementing the environment are considered, together with some of the problems that we had to address.

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Reiner W. Hartenstein Andres Keevallik

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© 1998 Springer-Verlag Berlin Heidelberg

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Sklyarov, V., Monteiro, R.S., Lau, N., Melo, A., Oliveira, A., Kondratjuk, K. (1998). Integrated development environment for logic synthesis based on dynamically reconfigurable FPGAs. In: Hartenstein, R.W., Keevallik, A. (eds) Field-Programmable Logic and Applications From FPGAs to Computing Paradigm. FPL 1998. Lecture Notes in Computer Science, vol 1482. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0055229

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  • DOI: https://doi.org/10.1007/BFb0055229

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-64948-9

  • Online ISBN: 978-3-540-68066-6

  • eBook Packages: Springer Book Archive

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