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Run-time management of dynamically reconfigurable designs

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Field-Programmable Logic and Applications From FPGAs to Computing Paradigm (FPL 1998)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1482))

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Abstract

A method for managing reconfigurable designs, which supports run-time configuration transformation, is proposed. This method involves structuring the reconfiguration manager into three components: a monitor, a loader, and a configuration store. Various trade-offs can be achieved in reconfiguration time, the optimality of the reconfigured circuits, and the complexity of the reconfiguration manager. We consider methods of reconfiguration and ways of exploiting run-time information available at compile time, and study their impact on design trade-offs. The proposed techniques, implementable in hardware or software, are supported by our tools and can be applied to both partially and non-partially reconfigurable devices. We describe the combined and the partitioned reconfiguration methods, and use them to illustrate the techniques and the associated trade-offs.

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References

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Reiner W. Hartenstein Andres Keevallik

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© 1998 Springer-Verlag Berlin Heidelberg

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Shirazi, N., Luk, W., Cheung, P.Y.K. (1998). Run-time management of dynamically reconfigurable designs. In: Hartenstein, R.W., Keevallik, A. (eds) Field-Programmable Logic and Applications From FPGAs to Computing Paradigm. FPL 1998. Lecture Notes in Computer Science, vol 1482. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0055233

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  • DOI: https://doi.org/10.1007/BFb0055233

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-64948-9

  • Online ISBN: 978-3-540-68066-6

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