Abstract
In this paper, a survey of reconfigurable computing is presented. There have been other surveys in this field, but none as exhaustive as this one tries to be. The main goal of this paper is to consider a large variety of different approaches to the field of reconfigurable computing, and to make a thorough classification. This classification is aimed at helping the understanding of the current systems, as well as the development of new systems. We first define the classification criteria and the classification itself. Each class is described briefly. Next, we classify the existing systems, based on their dominating characteristic, and finally we list each surveyed system under one of the classification classes. Each presented example is described using the same template (authors, essence of the approach, details of interest, advantages, drawbacks).
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References
G. Estrin, et al., “Parallel Processing in a Restructurable Computer System,” IEEE Trans. Electronic Computers, December 1963, pp. 747–755.
E. Sanchez, et al., “Static and Dynamic Configurable Systems,” Submitted to IEEE Transactions on Computers, 1998.
E. Waingold, et al., “Baring it all to Software: Raw Machines,” IEEE Computer, September 1997, pp. 86–93.
E. Mirsky, A. DeHon, “MATRIX: A Reconfigurable Computing Architecture with Configurable Instruction Distribution and Deployable Resources,” Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines, April 1996, pp. 157–166.
R.W. Hartenstein, et al, “A Reconfigurable Data-Driven ALU for Xputers,” IEEE Workshop on FPGAs for Custom Computing Machines, FCCM'94, Napa, CA., April 1994.
R. W. Hartenstein, et al., “A Novel Sequencer Hardware for Application Specific Computing,” ASAP'97, Zurich, Switzerland, July 1997
R. W. Hartenstein, “The Microprocessor is no more General Purpose: why Future Reconfigurable Platform will win,” Proceedings of the International Conference on Innovative Systems in Silicon, October 1997.
C. Ebeling, et al, “RaPiD — Reconfigurable Pipelined Datapath,” Proceedings of the 6th International Workshop on Field-Programmable Logic and Applications, FPL '96, Darmstadt, Germany, September 1996.
Moshe Sipper, et al., “The Firefly Machine: Online Evolware,” Proceedings, ICEC'97, April 97, pp. 181–186.
A. Thompson, “An evolved circuit, intrinsic in silicon, entwined with physics,” Proc. 1st Int. Conf. Evolvable Systems: From Biology to Hardware (ICES96) (Lecture Notes in Computer Science). Heidelberg: Springer-Verlag, 1997.
M. Gokhale, et al., “Building and Using a Highly Parallel Programmable Logic Array,” Computer, January 1991, pp. 81–89.
J.Vuillemin, et al., “Programmable Active Memories: Reconfigurable systems Come of Age,” IEEE Transactions on VLSI, Vol 4, No. 1, March 1996.
P. M. Athanas, H. F. Silverman, “Processor Reconfiguration Through Instruction-Set Metamorphosis,” IEEE Computer, March 1993, pp. 11–18.
J.-O. Haenni, et al., “RENCO: A Reconfigurable Network Computer,” submitted to: 6 th IEEE Symposium on FPGAs for Custom Computing Machines
C. Iseli, E. Sanchez, “Spyder: A SURE (SUperscalar and REconfigurable) Processor, “The Journal of Supercomputing, Vol 9. 1995, pp. 231–252.
M.J. Wirthlin, B. L. Hutchings, “A Dynamic Instruction Set Computer,” Proceedings of the IEEE Workshop on FPGAs for Custom Computing Machines, April 1995, pp. 99–107.
J. R. Hauzer, J. Wawrzynek, “GARP: A MIPS Processor with a Reconfigurable Coprocessor,” Proceedings of the IEEE Symposium on FPGAsfor Custom Computing Machines, April 1997. pp. 12–21.
D. A. Buell, J.M. Arnold, W.J. Kleinfelder, Splash 2: FPGAs in Custom Computing Machine, IEEE Computer Society Press, Los Alamitos, California, 1996.
T. Yamauchi, et al., “SOP: A Reconfigurable Massively Parallel System and Its Control-Data-Flow based Compiling Metod,” Proceedings of the IEEE Symposium on FPGAsfor Custom Computing Machines, April 1996, pp. 148–156.
A. DeHon, “Specialization versus Configuration,” MIT Transit Note #113
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Radunović, B., Milutinović, V. (1998). A survey of reconfigurable computing architectures. In: Hartenstein, R.W., Keevallik, A. (eds) Field-Programmable Logic and Applications From FPGAs to Computing Paradigm. FPL 1998. Lecture Notes in Computer Science, vol 1482. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0055265
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DOI: https://doi.org/10.1007/BFb0055265
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