Abstract
It is undoubtedly true, that the usage of a formal specification methodology in software design will reduce the development effort, particularly as embedded hard real-time systems show increasing functional complexity. We suggest the use of the language SDL even for the design of real-time systems with hard timing constraints. Emerging problems, caused by the non-deterministic semantics of SDL, can be solved by adding EDF process activation to the SDL system model. This paper describes the different steps necessary to map a SDL system specification to an analyzable task network. Considering a SDL process as a typical server process, the mapping rules are resolving the resulting interdependencies and delays, caused by possible priority inversion and blocking. Finally the study of an application example, the “Mine Control System” proofs the usabilty of the introduced methods.
The work presented in this paper is supported by the Deutsche Forschungsgemeinschaft as part of a research programme on “Rapid Prototyping for Embedded Hard Real-Time Systems” under Grant Fa 109/11-1.
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Kolloch, T., Färber, G. (1998). Mapping an embedded hard real-time systems SDL specification to an analyzable task network — A case study. In: Mueller, F., Bestavros, A. (eds) Languages, Compilers, and Tools for Embedded Systems. LCTES 1998. Lecture Notes in Computer Science, vol 1474. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0057788
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DOI: https://doi.org/10.1007/BFb0057788
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