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Reusable internal hardware templates

  • Conference paper
  • First Online:
Parallel and Distributed Processing (IPPS 1999)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1586))

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  • 119 Accesses

Abstract

This paper describes the framework of internal hardware templates. These reusable templates can be instantiated, inside the FPGA, to the required precision. Thus, the resource utilization of the target RCMs can be improved. Moreover, the configuration time can be eliminated after the first use of the template. The detail design is presented.

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Authors and Affiliations

  1. Computer Science Department, Illinois Insitute of Technology, Illinois, USA

    Ka°an Agun & Morris Chang

Authors
  1. Ka°an Agun
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  2. Morris Chang
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Editor information

José Rolim Frank Mueller Albert Y. Zomaya Fikret Ercal Stephan Olariu Binoy Ravindran Jan Gustafsson Hiroaki Takada Ron Olsson Laxmikant V. Kale Pete Beckman Matthew Haines Hossam ElGindy Denis Caromel Serge Chaumette Geoffrey Fox Yi Pan Keqin Li Tao Yang G. Chiola G. Conte L. V. Mancini Domenique Méry Beverly Sanders Devesh Bhatt Viktor Prasanna

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© 1999 Springer-Verlag

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Agun, K., Chang, M. (1999). Reusable internal hardware templates. In: Rolim, J., et al. Parallel and Distributed Processing. IPPS 1999. Lecture Notes in Computer Science, vol 1586. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0097955

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  • DOI: https://doi.org/10.1007/BFb0097955

  • Published:

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-65831-3

  • Online ISBN: 978-3-540-48932-0

  • eBook Packages: Springer Book Archive

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