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Solving satisfiability problems on FPGAs using experimental unit propagation heuristic

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Parallel and Distributed Processing (IPPS 1999)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1586))

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Abstract

This paper presents new results on an approach for solving satisfiability problems (SAT), that is, creating a logic circuit that is specialized to solve each problem instance on Field Programmable Gate Arrays (FPGAs). This approach has become feasible due to recent advances in Reconfigurable Computing.

We develop an algorithm that is suitable for a logic circuit implementation. This algorithm is basically equivalent to the Davis-Putnam procedure with Experimental Unit Propagation. The required hardware resources for the algorithm are less than those of MOM’s heuristics.

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References

  1. Y. Asahiro, K. Iwama, and E. Miyano. Random generation of test instances with controlled attributes. In Proceedings of the DIMACS Challenge II Workshop, 1993.

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  2. C. M. Li and Anbulagan. Heuristics based on unit propagation for satisfiability problems. In Proc. of 15th International Joint Conference on Artificial Intelligence, pages 366–371, 1997.

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  3. T. Suyama, M. Yokoo, and H. Sawada. Solving satisfiability problems using logic synthesis and reconfigurable hardware. In Proc. of the 31st Annual Hawaii International Conference on System Sciences Vol. VII, pages 179–186, 1998.

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Authors and Affiliations

  1. NTT Communication Science Laboratories, 2-4 Hikaridai Seika-cho Soraku-gun, Kyoto, Japan

    Takayuki Suyama, Makoto Yokoo & Akira Nagoya

Authors
  1. Takayuki Suyama
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  2. Makoto Yokoo
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  3. Akira Nagoya
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Editor information

José Rolim Frank Mueller Albert Y. Zomaya Fikret Ercal Stephan Olariu Binoy Ravindran Jan Gustafsson Hiroaki Takada Ron Olsson Laxmikant V. Kale Pete Beckman Matthew Haines Hossam ElGindy Denis Caromel Serge Chaumette Geoffrey Fox Yi Pan Keqin Li Tao Yang G. Chiola G. Conte L. V. Mancini Domenique Méry Beverly Sanders Devesh Bhatt Viktor Prasanna

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© 1999 Springer-Verlag

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Suyama, T., Yokoo, M., Nagoya, A. (1999). Solving satisfiability problems on FPGAs using experimental unit propagation heuristic. In: Rolim, J., et al. Parallel and Distributed Processing. IPPS 1999. Lecture Notes in Computer Science, vol 1586. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0097959

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  • DOI: https://doi.org/10.1007/BFb0097959

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-65831-3

  • Online ISBN: 978-3-540-48932-0

  • eBook Packages: Springer Book Archive

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