Skip to main content
SpringerLink
Log in

Compiler techniques for concurrent multithreading with hardware speculation support

  • Compiler Algorithms for Fine-Grain Parallelism
  • Conference paper
  • First Online:
Languages and Compilers for Parallel Computing (LCPC 1996)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1239))

Abstract

Recently proposed concurrent multithreading architectures employ sophisticated hardware to support speculation on control and data dependences as well as run-time data dependence check, which enables parallelization of program regions such as while-loops which previously were ignored. The new architectures demand compilers to put more emphasis on the formation and selection of parallel threads. Compilers also play an important role in reducing the cost of run-time data dependence check. This paper discusses these new issues.

This work was supported in part by NSF CAREER Award CCR-9502541, NSF Grant MIP 9496320, a gift from Intel Corporation, and by the U.S. Army Intelligence Center and Fort Huachuca under Contract DABT63-95-C-0127 and ARPA order no. D 346. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of the U. S. Army Intelligence Center and Fort Huachuca, or the U.S. Government.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Log in via an institution

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Randy Allen and Steve Johnson. Compiler C for vectorization, parallelization, and inline expansion. In Prof. of SIGPLAN '88 Conference on Programming Language Design and Implementation, pages 241–249, June 1988.

    Google Scholar 

  2. Pradeep K. Dubey, Kevin O'Brien, Kathryn O'Brien, and Charles Barton. Single-program speculative multithreading (SPSM) architecture: Compiler-assisted finegrained multithreading. In Proceedings of the IFIP WG 10.3 Working Conference on Parallel Architectures and Compilation Techniques, PACT '95, pages 109–121, June 27–29, 1995.

    Google Scholar 

  3. Manoj Franklin and Gurindar S. Sohi. The expandable split window paradigm for exploiting fine-grained parallelism. In Proceedings of the 19th Annual International Symposium on Computer Architecture, pages 58–67, May 19–21, 1992.

    Google Scholar 

  4. M. Girkar and C. Polychronopoulos. The HTG: An intermediate representation for programs based on control and data dependences. CSRD Technical Report No. 1046, Univ. of Illinois at Urbana-Champaign, 1991.

    Google Scholar 

  5. Justiani and L. J. Hendren. Supporting array dependence testing for an optimizing/parallelizing c compiler. In Proc. of the 1994 International Conference on Compiler Construction. Volume 749 of Lecture Notes in Computer Science. Springer Verlag, April 1994.

    Google Scholar 

  6. Z. Li. Compiler algorithms for event variable synchronization. In Proc. of the Fifth International Conference on Supercomputing (ACM), June 1991.

    Google Scholar 

  7. D.E. Maydan, S.P. Amarasinghe, and M.S. Lam. Array data-flow analysis and its use in array privatization. In Proc. of the 20th ACM Symp. on Principles of Programming Languages, pages 2–15, January 1993.

    Google Scholar 

  8. S. P. Midkiff and D. A. Padua. Compiler algorithms for synchronization. IEEE Transactions on Computers, C-36(12):1485–1495, December 1987.

    Google Scholar 

  9. Andreas I. Moshovos, Scott E. Breach, T. N. Vijaykumar, and Guri. S. Sohi. Submitted for a blind review to a conference.

    Google Scholar 

  10. B. A. Nayfeh and K. Olukotun. Exploring the design space for a shared-cache multiprocessor. In Proceedings of the 21st Annual International Symposium on Computer Architecture, pages 166–175, April 1994.

    Google Scholar 

  11. Gurindar S. Sohi, Scott E. Breach, and T. N. Vijaykumar. Multiscalar processors. In Proceedings of the 22nd Annual International Symposium on Computer Architecture, pages 414–425, June 22–24, 1995.

    Google Scholar 

  12. Jenn-Yuan Tsai and Pen-Chung Yew. The superthreaded architecture: Thread pipelining with run-time data dependence checking and control speculation. In Proceedings of International Conference on Parallel Architectures and Compilation Techniques, PACT '96, October 1996.

    Google Scholar 

Download references

Author information

Authors and Affiliations

  1. Department of Computer Science, University of Minnesota, 55455, Minneapolis, MN

    Zhiyuan Li, Xin Wang, Pen-Chung Yew & Bess Zheng

  2. Department of Computer Science, University of Illinois, 61801, Urbana, IL

    Jenn-Yuan Tsai

Authors
  1. Zhiyuan Li
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Jenn-Yuan Tsai
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Xin Wang
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Pen-Chung Yew
    View author publications

    You can also search for this author in PubMed Google Scholar

  5. Bess Zheng
    View author publications

    You can also search for this author in PubMed Google Scholar

Editor information

David Sehr Utpal Banerjee David Gelernter Alex Nicolau David Padua

Rights and permissions

Reprints and permissions

Copyright information

© 1997 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Li, Z., Tsai, JY., Wang, X., Yew, PC., Zheng, B. (1997). Compiler techniques for concurrent multithreading with hardware speculation support. In: Sehr, D., Banerjee, U., Gelernter, D., Nicolau, A., Padua, D. (eds) Languages and Compilers for Parallel Computing. LCPC 1996. Lecture Notes in Computer Science, vol 1239. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0017252

Download citation

  • DOI: https://doi.org/10.1007/BFb0017252

  • Published:

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-63091-3

  • Online ISBN: 978-3-540-69128-0

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics

Search

Navigation