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High performance parallel FFT on distributed memory parallel computers

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High Performance Computing (ISHPC 1997)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1336))

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Abstract

In this paper, a high performance parallelizing method of FFT is presented. Well known four or six step parallel algorithm with standard index map is not suitable for highly parallel computers, because it requires all-to-all communications between two phases of sub-FFTs which can not be overlap the computation of the each sub-FFT over the communication. We introduce another index map and algorithm which is intended to overcome the problem, and our results shows that our method out-perform the four step method in the 26 case out of 32 experiments. The results was obtained with up to 128 processors NEC Cenju-3 using the mini-MPI library.

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References

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  4. Takahashi, D., Kaneda, Y.: Implementation and Evaluation of 1-D FFT with External Memory on Parallel Computers, IPSJ SIG Notes, Vol.97, No.22, pp.7–12, 1997

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Constantine Polychronopoulos Kazuki Joe Keijiro Araki Makoto Amamiya

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© 1997 Springer-Verlag Berlin Heidelberg

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Shimizu, N., Watanabe, T. (1997). High performance parallel FFT on distributed memory parallel computers. In: Polychronopoulos, C., Joe, K., Araki, K., Amamiya, M. (eds) High Performance Computing. ISHPC 1997. Lecture Notes in Computer Science, vol 1336. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0024226

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  • DOI: https://doi.org/10.1007/BFb0024226

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-63766-0

  • Online ISBN: 978-3-540-69644-5

  • eBook Packages: Springer Book Archive

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