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Data flow and dependence analysis for instruction level parallelism

  • V. Fine Grain Parallelism
  • Conference paper
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Languages and Compilers for Parallel Computing (LCPC 1991)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 589))

Abstract

Instruction-level parallel architectures present their own set of opportunities and needs, requiring the development of a new class of compiler optimization techniques. Dynamic single assignment is presented as a parallel program representation that permits programs, with cyclic control flow graphs, to be expressed in their maximally parallel form (i.e., with a minimal number of dependence arcs). Also, a data flow analysis technique is outlined that extends to subscripted references the full power of conventional techniques that normally only work with scalar variables. The focus is on the representation and analysis of programs containing subscripted references with an emphasis on innermost loops whose bodies contain arbitrary, acyclic control flow.

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Authors and Affiliations

  1. Hewlett-Packard Laboratories, USA

    B. R. Rau

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  1. B. R. Rau
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Editor information

Utpal Banerjee David Gelernter Alex Nicolau David Padua

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© 1992 Springer-Verlag Berlin Heidelberg

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Rau, B.R. (1992). Data flow and dependence analysis for instruction level parallelism. In: Banerjee, U., Gelernter, D., Nicolau, A., Padua, D. (eds) Languages and Compilers for Parallel Computing. LCPC 1991. Lecture Notes in Computer Science, vol 589. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0038668

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  • DOI: https://doi.org/10.1007/BFb0038668

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-55422-6

  • Online ISBN: 978-3-540-47063-2

  • eBook Packages: Springer Book Archive

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