Abstract
This paper presents a formal specification and a proof of correctness for the register optimization task in high-level synthesis. A widely implemented register optimization algorithm is modeled in higher-order logic and verified in a theorem prover environment. A rich collection of correctness properties is systematically formulated during the theorem proving exercise. These properties constitute a detailed set of formal assertions that are identified with the invariants at various stages of the algorithm. The formal assertions are then embedded as programming assertions in the implementation of the register optimization algorithm in a production-strength high-level synthesis system. When turned on, the programming assertions (1) certify whether a specific run of the high-level synthesis system produced designs with error-free register allocation and, (2) in the event of a failure, help discover and isolate programming errors in the implementation.
We present a detailed example and supporting experimental data to demonstrate the effectiveness of these assertions in discovering and isolating errors. Based on this experience, we discuss the role of the formal theorem proving exercise in discovering a useful set of assertions for embedding in the register optimization implementation and argue that in the absence of using the mechanical proof checking effort it would have been very hard if not impossible to discover a set of assertions so useful and expressed with such precision.
This work was partially supported by the DARPA and monitored by the FBI, under contract number J-FBI-93-116.
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Narasimhan, N., Vemuri, R. (1998). On the effectiveness of theorem proving guided discovery of formal assertions for a register allocator in a high-level synthesis system. In: Grundy, J., Newey, M. (eds) Theorem Proving in Higher Order Logics. TPHOLs 1998. Lecture Notes in Computer Science, vol 1479. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0055147
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DOI: https://doi.org/10.1007/BFb0055147
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