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65-nm CMOS Voltage-to-Time Converter for 5-GS/s Time-Based ADCs

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Abstract

This paper discusses a voltage-to-time converter (VTC) designed for use in a time-based analog-to-digital converter. The VTC considered in this work is based on a starved-inverter topology. Linearity, delay, and jitter of the VTC are analyzed to facilitate a physical understanding of the circuit performance. The design is experimentally verified in a 65-nm CMOS technology. Measurement results show that the VTC, operating with a 5-GHz clock, has an output delay range of \(\pm 25\,{\text{ ps }}\), 4.4 effective number of bits (ENOB), and output jitter of \(0.5\,\text{ ps }\) RMS while consuming 4 mW of power. The input effective resolution bandwidth (ERBW) of the VTC is measured to be 4.1 GHz, over which the ENOB remains above 3.5 bits. The same VTC, operating with a 7.5-GHz clock, consumes 9.7 mW of power from a 1.2-V supply, has ENOB of >3.8 bits, ERBW of >7 GHz, output jitter of \(0.4\,\text{ ps }\) RMS, and output delay range of \(\pm 25\,\text{ ps }\). The VTC achieves the widest input bandwidth of any VTC reported to date.

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Notes

  1. In the case of a VTC, the headroom advantage applies not to voltage but to time—the VTC output can have double the delay range without modifying the timing constraints.

  2. \(C_\mathrm{out}\) is assumed constant in this analysis and equal to its value when \(V_\mathrm{out}=\frac{1}{2}V_\mathrm{dd}\).

  3. Flicker noise is ignored since the \(1/f\)-corner frequency is much smaller than the intended clock frequency.

  4. [6] showed that this approximation slightly underestimates jitter.

  5. Measurements were performed with a Keysight, formally Agilent, DSAX93204A scope.

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Acknowledgments

This work was supported by the University of Calgary, the Natural Sciences and Engineering Research Council of Canada, CMC Microsystems, Alberta Innovates Technology Futures, and NSERC’s Special Research Opportunity program.

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  1. Andrew R. Macpherson

    Present address: TEKTELIC Communications Inc., Calgary, Canada

Authors and Affiliations

  1. Department of Electrical and Computer Engineering, University of Calgary, Calgary, Canada

    Andrew R. Macpherson, Leonid Belostotski & James W. Haslett

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  1. Andrew R. Macpherson
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Correspondence to Leonid Belostotski.

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Macpherson, A.R., Belostotski, L. & Haslett, J.W. 65-nm CMOS Voltage-to-Time Converter for 5-GS/s Time-Based ADCs. Circuits Syst Signal Process 34, 3121–3145 (2015). https://doi.org/10.1007/s00034-015-0009-5

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