Skip to main content
Springer Nature Link
Log in

Extremely Low-Voltage Bulk-Driven Tunable Transconductor

  • Published:
Circuits, Systems, and Signal Processing Aims and scope Submit manuscript

Abstract

A design solution for bulk-driven tunable transconductor capable of working under extremely low supply/consumption with rail-to-rail input common-mode range is presented in this work. The proposed transconductor topology consists of six bulk-driven CMOS inverters, and it uses a very simple biasing circuit for the transconductance tuning. The design robustness was verified for 0.5 and 0.25 V power supplies offering the advantages of the current-controlled input transconductance. For 0.5 V power supply, the proposed transconductor has 0.075–10.2 \(\upmu \hbox {S}\) transconductance tuning range, input-referred intercept point IP3 = 1.81 V, and 4.62 MHz bandwidth for 3 \(\upmu \hbox {A}\) current consumption. The design robustness of the tunable transconductor was verified by means of computer simulation using triple-well 0.18 \(\upmu \hbox {m}\) CMOS process.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Subscribe and save

Springer+ Basic
$34.99 /Month
  • Get 10 units per month
  • Download Article/Chapter or eBook
  • 1 Unit = 1 Article or 1 Chapter
  • Cancel anytime
Subscribe now

Buy Now

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8

Similar content being viewed by others

References

  1. H. Berthelemy, S. Meillere, J. Gaubert, N. Dahaese, S. Bourdel, OTA based on CMOS inverters and application in the design of tunable bandpass filter. Analog Integr. Circuits Signal Process. 57, 169–178 (2008)

    Article  Google Scholar 

  2. D.M. Binkley, Tradeoffs and Optimization in Analog CMOS design (Wiley, Hoboken, 2008)

    Book  Google Scholar 

  3. B.J. Blalock, P.E. Allen, G.A. Rincon-Mora, Designing 1-V op amps using standard digital CMOS technology. IEEE Trans. Circuits Syst. II 45, 769–780 (1998)

    Article  Google Scholar 

  4. J.M. Carrillo, G. Torelli, R. Pérez Aloe, J.F. Duque-Carrillo, 1-V rail-to-rail bulk-driven CMOS OTA with enhanced gain and gain-bandwidth product, in Proceedings European Conference on Circuit Theory and Design, pp. 261–264 (2005)

  5. J.M. Carrillo, G. Torelli, M.A. Domínguez, J.F. Duque-Carrillo, On the input common-mode voltage range of CMOS bulk-driven input stages. Int. J. Circuit Theory Appl. 39, 649–664 (2011)

    Article  Google Scholar 

  6. J.E. Duque-Carrillo, J.M. Carrillo, J.L. Ausin, G. Torelli, Input/output rail-to-rail CMOS operational amplifier with shaped common mode response. Analog Integr. Circuits Signal Process. 34, 221–232 (2003)

    Article  Google Scholar 

  7. A. Guzinski, M. Bialko, J. Matheau, Body driven differential amplifier for application in continuous-time active-C filter, in Proceedings European Conference on Circuit Theory and Design, pp. 315–319 (1987)

  8. J.H. Huijsing, D. Linebarger, Low-voltage operational amplifier with rail-to-rail input and output ranges. IEEE J. Solid-State Circuits 20, 1144–1150 (1985)

    Article  Google Scholar 

  9. P.R. Kinget, Device mismatch and tradeoffs in the design of analog circuits. IEEE J. Solid- State Circuits 40, 1212–1224 (2005)

    Article  Google Scholar 

  10. T. Kulej, 0.5-V bulk-driven OTA and its applications. Int. J. Circuit Theory Appl. 43, 187–204 (2015)

    Article  Google Scholar 

  11. T. Kulej, F. Khateb, Bulk-driven adaptively biased OTA in 0.18um CMOS. Electron. Lett. 51, 458–460 (2015)

    Article  Google Scholar 

  12. M. Kumngern, 0.5-V bulk-driven fully differential current conveyor, in IEEE Symposium on Computer Applications and Industrial Electronics (ISCAIE), Penang. Malaysia, pp. 184–188 (2014)

  13. F. Munoz, A. Torralba, R.G. Carvajal, J. Tombs, J. Ramirez-Angulo, Floating-gate-based tunable low-voltage linear transconductor and its application to HF gm-C filters design. IEEE Trans. Circ. Syst. II 48, 106–110 (2001)

    Article  Google Scholar 

  14. B. Nauta, A CMOS transconductance-C filter technique for very high frequencies. IEEE J. Solid State Circuits 27, 142–153 (1992)

    Article  Google Scholar 

  15. V. Papageorgiou, S. Vlassis, Rail-to-rail input-stage with linearly tunable transconductance. Electron. Lett. 46, 458–460 (2013)

    Google Scholar 

  16. M. Pelgrom, A. Duinmaijer, A. Welbers, Matching properties of MOS transistors. IEEE J. Solid-State Circuits 24, 1433–1440 (1989)

    Article  Google Scholar 

  17. J. Ramírez-Angulo, S.C. Choi, G. González-Altamirano, Low-voltage circuit building blocks using multiple-input floating gate transistor. IEEE Trans. Circuits Syst. I 42, 971–974 (1995)

    Article  Google Scholar 

  18. W. Sansen, Distortion in elementary transistor circuits. IEEE Trans. Circuits Syst. II 46, 315–325 (1999)

    Article  Google Scholar 

  19. T. Shibata, T. Ohmi, A functional MOS transistor featuring gate-level weighted sum and threshold operations. IEEE Trans. Electron Devices 39, 1444–1455 (1992)

    Article  Google Scholar 

  20. A. Suadet, V. Kasemsuvan, A CMOS inverter-based class-AB pseudo differential amplifier for HF applications, in IEEE International Conference on Electron. Devices and Solid-State Circuits, pp. 1–4 (2010)

  21. S. Szczepanski, B. Pankiewicz, S. Koziel, M. Wojcikowski, Multiple output differential OTA with linearizing bulk-driven active-error feedback loop for continuous-time filter applications. Int. J. Circuit Theory Appl. 43, 1671–1686 (2015)

    Article  Google Scholar 

  22. S. Vlassis, S. Siskos, Design of voltage-mode and current-mode computational circuits using floating-gate MOS transistors. IEEE Trans. Circuits Syst. I 51, 329–341 (2004)

    Article  Google Scholar 

  23. S. Vlassis, 0.5 V CMOS inverter-based tunable transconductor. Analog Integr. Circuits Signal Process. 72, 289–292 (2012)

    Article  Google Scholar 

  24. X. Zhaoa, H. Fangc, T. Lingc, J. Xuc, Transconductance improvement method for low-voltage bulk-driven input stage. Integr. VLSI J. 49, 98–103 (2015)

    Article  Google Scholar 

Download references

Acknowledgments

Research described in this paper was financed by the National Sustainability Program under Grant LO1401 and by the Czech Science Foundation under Grant No. P102-15-21942S. For the research, infrastructure of the SIX Center was used.

Author information

Authors and Affiliations

  1. Department of Microelectronics, Brno University of Technology, Technická 10, Brno, Czech Republic

    Fabian Khateb

  2. Faculty of Biomedical Engineering, Czech Technical University in Prague, nám. Sítná 3105, Kladno, Czech Republic

    Fabian Khateb

  3. Department of Electrical Engineering, Technical University of Częstochowa, 42-201, Czestochowa, Poland

    Tomasz Kulej

  4. Electronics Laboratory, Physics Department, University of Patras, Patras, Greece

    Spyridon Vlassis

Authors
  1. Fabian Khateb
    View author publications

    You can also search for this author inPubMed Google Scholar

  2. Tomasz Kulej
    View author publications

    You can also search for this author inPubMed Google Scholar

  3. Spyridon Vlassis
    View author publications

    You can also search for this author inPubMed Google Scholar

Corresponding author

Correspondence to Fabian Khateb.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Khateb, F., Kulej, T. & Vlassis, S. Extremely Low-Voltage Bulk-Driven Tunable Transconductor. Circuits Syst Signal Process 36, 511–524 (2017). https://doi.org/10.1007/s00034-016-0329-0

Download citation

  • Received:

  • Revised:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s00034-016-0329-0

Keywords