Abstract
A simple ultra-low-voltage realization of second-generation voltage conveyor (VCII) based on the employment of super source follower, as voltage follower, and of current follower is presented in this paper. Full CMOS realization of the proposed VCII contains only ten transistors and two biasing voltages except for DC power supply voltages. Thanks to the super source follower structure, the parasitic resistance of the Z terminal is very low. As for parasitic resistance seen at the Y terminal, it can be reduced with the help of biasing voltage of current follower. Furthermore, its value can be tuned through the biasing voltage for different application circuits. Hence, this structure can be used as voltage-controlled second-generation voltage conveyor (VC-VCII). Post-layout simulation results, based on TSMC 0.18 μm CMOS process parameters, are provided. The main attractive features of the proposed VCII can be described as follows: operation under ± 0.45 V power supply voltages, consisting of only ten transistors, free from the body effect, capability of operating in a low-voltage environment, and parasitic resistance value at Z terminal equal to few Ohms.













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We are thankful to Istanbul Technical University VLSI Laboratories for the Cadence Design Environment support.
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Yesil, A., Minaei, S. & Psychalinos, C. ± 0.45 V CMOS Second-Generation Voltage Conveyor Based on Super Source Follower. Circuits Syst Signal Process 41, 1819–1833 (2022). https://doi.org/10.1007/s00034-021-01867-7
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DOI: https://doi.org/10.1007/s00034-021-01867-7