Enhanced Sharpening of CIC Decimation Filters, Implementation and Applications

Abstract

This paper proposes low-cost wide-band generic cascaded-integrator-comb decimation filters with improved magnitude response. The decimation structures are realized as cascade of sharpening sections, where decimation factor M expressed as $M = M_1M_2$, $M_1, M_2 \in {\mathbb {Z}}^+$. The proposed decimation structure-I minimizes pass-band droop using a cascade of Kaiser Hamming (KH) and Saramäki–Ritoniemi (SR) sharpening structures. The first stage decimates the signal by $M_1$ using KH sharpening, followed by SR sharpening in the second stage to down-sample it further by $M_2$. The coefficients of SR structure are determined using linear programming in MATLAB. The proposed decimation structure-I designed for various integer decimation factors provides an average pass-band droop of $-\,0.09$ dB at the normalized frequency of 1/2M and an average alias rejection of $-\,44$ dB at the normalized frequency of 3/2M. The decimation structure-II further increases the alias rejection by using two-passes of SR structure. It achieves an average alias rejection of $-\,87$ dB, but has slightly inferior pass-band droop of $-\,0.17$ dB. The proposed designs when implemented on FPGA (field programmable gate arrays) have lower slice requirement and achieve higher maximum operating frequency than other existing competing designs. The performance of proposed decimation filters is confirmed using computer simulations of analog-to-digital converters and sigma-delta modulators.