Skip to main content
Log in

A Novel CFDITA-Based Design of Grounded Capacitance Multiplier and Its Transpose Structure

  • Published:
Circuits, Systems, and Signal Processing Aims and scope Submit manuscript

Abstract

A new circuit realization of capacitance multiplier based on active block, current follower differential input transconductance amplifier is introduced in the paper. The circuit employs one current follower differential input transconductance amplifier, two resistors and one capacitor. The proposed capacitance multiplier has a good range of multiplication factor (up to 30). Multiplication factor of the proposed circuit is adjustable by external resistor and by bias current as well. The comprehensive study of the proposed circuit including non-idealities and parasitic element effects has been carried out. The proposed capacitance multiplier circuit is simulated on Cadence Virtuoso using 0.18 μm gpdk CMOS technology and post layout simulation results are demonstrated to validate the working of the proposed circuit. The layout of the used active block occupies an area of 26.26 μm × 28.79 μm. The proposed circuit shows good performance against transistors mismatch, process and temperature variations. Moreover, the experimental results of the circuit using off-the-shelf integrated circuits are also carried out to demonstrate its practicality. In the last, the transpose structure of the proposed capacitance multiplier circuit is also explored. The obtained transposed structure is realized using active element namely, voltage differencing buffered amplifier.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10
Fig. 11
Fig. 12
Fig. 13
Fig. 14
Fig. 15
Fig. 16
Fig. 17
Fig. 18
Fig. 19
Fig. 20
Fig. 21

Similar content being viewed by others

Data availablity

Data sharing not applicable to this article as no datasets were generated or analyzed during the current study.

References

  1. M.T. Abuelma’atti, N.A. Tasadduq, Electronically tunable capacitance multiplier and frequency dependent negative-resistance simulator using the current controlled current conveyor. Microelectron. J. 30(9), 869–873 (1999)

    Article  Google Scholar 

  2. M.A. Al-Absi, M.T. Abuelmaatti, A novel tunable grounded positive and negative impedance multiplier. IEEE Trans. Circuits Syst. II 66(6), 924–927 (2019)

    Article  Google Scholar 

  3. M.A. Al-Absi, M.T. Abulemaatti, A tunable floating impedance multiplier. Arabian J. Sci. Eng. 44, 7085–7089 (2019)

    Article  Google Scholar 

  4. M.A. Al-Absi, A.A. Al-Khulaifi, A new floating and tunable capacitance multiplier with large multiplication factor. IEEE Access. 7, 120076–120081 (2019)

    Article  Google Scholar 

  5. M.A. Al-Absi, E.S. Al-Suhaibani, M.T. Abuelma’atti, A new compact CMOS C-multiplier. Analog Integr. Circuits Signal Process. 90(3), 653–658 (2017)

    Article  Google Scholar 

  6. H. Alpaslan, E. Yuce, Bandwidth expansion methods of inductance simulator circuits and voltage-mode biquads. J. Circuits Syst. 20(3), 557–572 (2011)

    Article  Google Scholar 

  7. R. Aparicio, A. Hajimiri, Capacity limits and matching properties of integrated capacitors. IEEE J. Solid State Circuits 37(3), 384–393 (2002)

    Article  Google Scholar 

  8. U.E. Ayten, M. Sagbas, N. Herencsar, J. Koton, Novel floating general element simulators using CBTA. Radioengineering. 21(1), 11–19 (2012)

    Google Scholar 

  9. B.B. Bhattacharyya, M.N.S. Swamy, Network transposition and its application in synthesis. IEEE Trans. Circuit Theory 18(3), 394–397 (1971)

    Article  Google Scholar 

  10. D. Biolek, CDTA-building block for current-mode analog signal processing. In Proceedings of the ECCTD’03, Krakow, Poland, vol. 3, pp. 397–400 (2003)

  11. D. Biolek, R. Senani, V. Biolkova, Z. Kolka, Active elements for analog signal processing: classification, review, and new proposals. Radioengineering. 17(4), 15–32 (2008)

    Google Scholar 

  12. D. Biolek, J. Vavra, A. Keskin, CDTA-based capacitance multipliers. Circuits Syst. Signal Process. 38(4), 1466–1481 (2019)

    Article  Google Scholar 

  13. G.D. Cataldo, G. Ferri, S. Pennisi, Active capacitance multipliers using current conveyors. In IEEE international symposium on circuits and systems (ISCAS), pp. 343–346 (1998)

  14. B. Chaturvedi, A. Kumar, DXCCTA: a new active element. In IEEE 1st international conference on power electronics, intelligent control and energy systems (ICPEICES), pp. 1–6 (2016)

  15. B. Chaturvedi, A. Kumar, CMOS MO-CFDITA based fully electronically controlled square/triangular wave generator with adjustable duty cycle. IET Circuits Devices Syst. 12(6), 817–826 (2018)

    Article  Google Scholar 

  16. B. Chaturvedi, A. Kumar, Electronically tunable current-mode instrumentation amplifier with high CMRR and wide bandwidth. AEU-Int. J. Electron. Commun. 92, 116–123 (2018)

    Article  Google Scholar 

  17. J. Choi, J. Park, W. Kim, K. Lim, J. Laskar, High multiplication factor capacitor multiplier for an on-chip PLL loop filter. Electron. Lett. 45(5), 239–240 (2009)

    Article  Google Scholar 

  18. E.T. Cuautle, L.G. De la Fraga, K. Phanrattanachaic, K. Pitaksuttayaprot, CDCTA and OTA realization of a multi-phase sinusoidal oscillator. IETE Tech. Rev. 32(6), 497–504 (2015)

    Article  Google Scholar 

  19. E.T. Cuautle, A.C. Sanabria-Borbon, Optimising operational amplifiers by evolutionary algorithms and gm/Id method. Int. J. Electron. 103(10), 1665–1684 (2016)

    Article  Google Scholar 

  20. L.G. De la Fraga, E.T. Cuautle, Linearizing the transconductance of an OTA through the optimal sizing by applying NSGA-II. In 15th International conference on synthesis, modeling, analysis and simulation methods and applications to circuit design (SMACD), IEEE, pp. 1–9 (2018)

  21. M. Dogan, E. Yuce, A new CFOA based grounded capacitance multiplier. AEU-Int. J. Electron. Commun. 115, 153034 (2020)

    Article  Google Scholar 

  22. M.E. Fakhfakh, T. Cuautle, D. Moro, M. Loulou, Optimized CCII–based tuneable filter and oscillator using minimum number of passive elements. In: 5th International conference: sciences of electronic, technologies of information and telecommunications (SETIT), IEEE (2009)

  23. G. Ferri, S. Pennisi, A 1.5-V current-mode capacitance multiplier. In Proceedings of the tenth international conference on microelectronics, pp. 9–12 (1998)

  24. I.A. Khan, M.T. Ahmed, OTA-based integrable voltage/current-controlled ideal C-multiplier. Electron. Lett. 22(7), 365–366 (1986)

    Article  Google Scholar 

  25. A. Kumar, B. Chaturvedi, Novel CMOS CFDITA and its application as electronically tunable bistable multivibrator. In: International conference on signal processing and communication (ICSC), pp. 374–379 (2016)

  26. A. Kumar, B. Chaturvedi, Fully electronically controllable Schmitt trigger circuit with dual hysteresis. Electron. Lett. 53(7), 459–461 (2017)

    Article  Google Scholar 

  27. A. Kumar, B. Chaturvedi, J. Mohan, Possible active elements transposition and applications. In International conference on signal processing and communications (ICSC), pp. 271–274 (2019)

  28. J. López-Arredondo, E.T. Cuautle, L.G. De la Fraga, High-Q and wide-bandwidth capacitor multiplier optimized by NSGA-II. IETE J. Res. 65(5), 661–666 (2019)

    Article  Google Scholar 

  29. I. Myderrizi, A. Zeki, Electronically tunable DXCCII-based grounded capacitance multiplier. AEU-Int. J. Electron. Commun. 68(9), 899–906 (2014)

    Article  Google Scholar 

  30. E. Özer, Electronically tunable CFTA based positive and negative grounded capacitance multipliers. AEU-Int. J. Electron. Commun. 134, 153685 (2021)

    Article  Google Scholar 

  31. E. Ozer, M.E. Basak, F. Kacar, Realizations of lossy and lossless capacitance multiplier using CFOAs. AEU-Int. J. Electron. Commun. 127, 153444 (2020)

    Article  Google Scholar 

  32. A.S. Sedra, K. Smith, A second-generation current conveyor and its applications. IEEE Trans. Circuit Theory 17(1), 132–134 (1970)

    Article  Google Scholar 

  33. S. Singh, Jatin, N. Pandey, R. Pandey, Electronically tunable grounded capacitance multiplier. IETE J. Res. (2020). https://doi.org/10.1080/03772063.2020.1739573

    Article  Google Scholar 

  34. S. Singh, N. Pandey, R. Pandey, CFOA based negative floating capacitance multiplier, in Advances in Electronics Engineering. ed. by G. Chandrarathne (Springer, Singapore, 2020), pp. 231–244

    Chapter  Google Scholar 

  35. R. Sotner, J. Jerabek, N. Herencsar, Voltage differencing buffered/inverted amplifiers and their applications for signal generation. Radioengineering. 22(2), 490–504 (2013)

    Google Scholar 

  36. R. Sotner, J. Jerabek, L. Polak, J. Petrzela, Capacitance multiplier using small values of multiplication factors for adjustability extension and parasitic resistance cancellation technique. IEEE Access. 8, 144382–144392 (2020)

    Article  Google Scholar 

  37. V. Stornelli, L. Safari, G. Barile, G. Ferri, A new extremely low power temperature insensitive electronically tunable VCII-based grounded capacitance multiplier. IEEE Trans. Circuits Syst. II Express Briefs 68(1), 72–76 (2021)

    Article  Google Scholar 

  38. V. Stornelli, L. Safari, G. Barile, G. Ferri, A new VCII based grounded positive/negative capacitance multiplier. AEU-Int. J. Electron. Commun. 137, 153793 (2021)

    Article  Google Scholar 

  39. M.N.S. Swamy, Transpose of a multiterminal element and applications. IEEE Trans. Circuits Syst. II 57(9), 696–700 (2010)

    Article  Google Scholar 

  40. W. Tangsrirat, Floating simulator with a single DVCCTA. Indian J. Eng. Mater. Sci. 20(2), 79–86 (2013)

    Google Scholar 

  41. W. Tangsrirat, O. Channumsin, Tunable floating capacitance multiplier using single fully balanced voltage differencing buffered amplifier. J. Commun. Technol. Electron. 64(8), 797–803 (2019)

    Article  Google Scholar 

  42. R. Verma, N. Pandey, R. Pandey, Novel CFOA based capacitance multiplier and its application. AEU-Int. J. Electron. Commun. 107, 192–198 (2019)

    Article  Google Scholar 

  43. A. Yesil, E. Yuce, S. Minaei, Grounded capacitance multipliers based on active elements. AEU Int. J. Electron. Commun. 79, 243–249 (2017)

    Article  Google Scholar 

  44. E. Yuce, A novel floating simulation topology composed of only grounded passive components. Int. J. Electron. 97(3), 249–262 (2010)

    Article  Google Scholar 

  45. T. Yucehan, E. Yuce, A new grounded capacitance multiplier using a single ICFOA and a grounded capacitor. IEEE Trans. Circuits Syst. II Express Briefs 69(3), 729–733 (2021)

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Dheeraj Singh.

Additional information

Publisher's Note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Kumar, A., Singh, D. & Nand, D. A Novel CFDITA-Based Design of Grounded Capacitance Multiplier and Its Transpose Structure. Circuits Syst Signal Process 41, 5319–5339 (2022). https://doi.org/10.1007/s00034-022-02032-4

Download citation

  • Received:

  • Revised:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s00034-022-02032-4

Keywords

Navigation