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Half-Way Stop Adaptive Pattern Search Algorithm for Motion Estimation and Dedicated VLSI Architecture

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Abstract

Motion estimation (ME) plays a vital role in performance of any video codec as it addresses the temporal redundancies existing within consecutive frames in any video sequence. The computational complexity of the ME unit is major with respect to the other blocks in the video codec. Researchers and practitioners prefer to use block matching algorithm for performing ME as it is efficient and simultaneously easy to implement. Some ME algorithms follow fixed search patterns, while the others are adaptive and tries to explore the correlation existing within neighbouring blocks of a video frame. This paper presents a new motion estimation algorithm named half-way stop adaptive pattern search algorithm (HAPSA) that reduces the computation of ME by lowering search points, using a proposed half-way stop technique and adaptive search pattern that can explore both fast and slow motion content in a video frame. The proposed HAPSA applies dual-threshold technique—one for classifying the block between zero motion and nonzero motion vector block and another for checking the accuracy of the motion vector. This helps in optimizing the clock cycle requirement and hardware utilization during VLSI design. The proposed VLSI system demonstrates architectural innovation that supports multiple dataflow models with high data throughput. The principal driving force behind the hardware architecture is an output stationary dataflow model wherein 16 reference frame pixels are broadcasted to all the processing elements every clock cycle. Working at a frequency of 357 MHz, the proposed architecture can process a 422 full HD (1920 × 1080) frames per second. The overall gate count of the design turns to be 49 K gate equivalent. The appreciable results with respect to some of the recent works can motivate one to include the proposed system in portable consumer video devices.

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Data Availability

The datasets analysed during the current study are available in the VIPSL Database: Images & Video Clips (2), (https://see.xidian.edu.cn/vipsl/database_Video.html).

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Authors and Affiliations

  1. Department of IT & Analytics, Indian Institute of Management Bodh Gaya, Uruvela, Prabandh Vihar Bodh Gaya, Gaya, Bihar, 824234, India

    Rohan Mukherjee

  2. Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology Kharagpur, Kharagpur, West Bengal, 721302, India

    Baishik Biswas & Indubu Gaana Vinod

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  1. Rohan Mukherjee
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  2. Baishik Biswas
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Mukherjee, R., Biswas, B. & Vinod, I.G. Half-Way Stop Adaptive Pattern Search Algorithm for Motion Estimation and Dedicated VLSI Architecture. Circuits Syst Signal Process 42, 1617–1638 (2023). https://doi.org/10.1007/s00034-022-02182-5

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