Abstract
Autosymmetric functions exhibit a special type of regularity that can speed-up the minimization process. Based on this autosymmetry, we propose a three level form of logic synthesis, called ORAX (EXOR-AND-OR), to be compared with the standard minimal SOP (Sum of Products) form.
First we provide a fast ORAX minimization algorithm for autosymmetric functions. The ORAX network for a function f has a first level of at most 2(n−k) EXOR gates, followed by the AND-OR levels, where n is the number of input variables and k is the “autosymmetry degree” of f. In general a minimal ORAX form has smaller size than a standard minimal SOP form for the same function. We show how the gain in area of ORAX over SOP can be measured without explicitly generating the latter. If preferred, a SOP expression can be directly derived from the corresponding ORAX. A set of experimental results confirms that the ORAX form is generally more compact than the SOP form, and its synthesis is much faster than classical three-level logic minimization. Indeed ORAX and SOP minimization times are often comparable, and in some cases ORAX synthesis is even faster.
This is a preview of subscription content, log in via an institution to check access.
Similar content being viewed by others
References
Bernasconi, A., Ciriani, V., Luccio, F., Pagli, L.: Three-level logic minimization based on function regularities. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(8), 1005–1016 (2003)
Bernasconi, A., Ciriani, V., Luccio, F., Pagli, L.: Exploiting regularities for Boolean function synthesis. Theory Comput. Syst. 39(4), 485–501 (2006)
Bryant, R.: Graph based algorithm for Boolean function manipulation. IEEE Trans. Comput. 35(9), 667–691 (1986)
Ciriani, V.: Logic minimization using exclusive OR gates. In: ACM/IEEE 38th Design Automation Conference (DAC), pp. 115–120 (2001)
Ciriani, V.: Synthesis of SPP three-level logic networks using affine spaces. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(10), 1310–1323 (2003)
Cohn, P.: Algebra, vol. 1. Wiley, New York (1981)
Coudert, O.: Two-level logic minimization: an overview. Integration 17, 97–140 (1994)
Debnath, D., Sasao, T.: A heuristic algorithm to design AND-OR-EXOR three-level networks. In: Asia and South Pacific Design Automation Conference, pp. 69–74 (1998)
Debnath, D., Sasao, T.: Multiple-valued minimization to optimize PLAs with output EXOR gates. In: IEEE International Symposium on Multiple-Valued Logic, pp. 99–104 (1999)
Dubrova, E., Miller, D., Muzio, J.: AOXMIN-MV: a heuristic algorithm for AND-OR-XOR minimization. In: 4th Int. Workshop on the Applications of the Reed Muller Expansion in Circuit Design, pp. 37–54 (1999)
Eggerstedt, M., Hendrich, N., von der Heide, K.: Minimization of parity-checked fault-secure AND/EXOR networks. In: IFIP WG 10.2 Workshop on Applications of the Reed-Muller Expansion in Circuit Design, pp. 142–146 (1993)
Fujita, M., Matsunaga, Y., Ciesielski, M.: Multi-level logic optimization. In: Hassoun, S., Sasao, T. (eds.) Logic Synthesis and Verification, pp. 29–63. Kluwer Academic, Dordrecht (2002)
Hachtel, G., Somenzi, F.: Logic Synthesis and Verification Algorithms. Kluwer Academic, Dordrecht (1996)
Kam, T., Villa, T., Brayton, R., Sangiovanni-Vincentelli, A.: Synthesis of Finite State Machines: Functional Optimization. Kluwer Academic, Dordrecht (1996)
Karpovsky, M.: Finite Orthogonal Series in the Design of Digital Devices. Wiley, New York (1976)
Kohavi, Z.: Switching and Finite Automata Theory. McGraw-Hill, New York (1970)
Luccio, F., Pagli, L.: On a new Boolean function with applications. IEEE Trans. Comput. 48(3), 296–310 (1999)
Sasao, T.: AND-EXOR expressions and their optimization. In: Sasao, T. (ed.) Logic Synthesis and Optimization, Kluwer Academic, Dordrecht (1993)
Sasao, T.: Switching Theory for Logic Synthesis. Kluwer Academic, Dordrecht (1999)
Yang, S.: Synthesis on Optimization Benchmarks. User guide, Microelectronic Center (1991). Benchmarks available at ftp://ftp.sunsite.org.uk/computing/general/espresso.tar.Z
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
About this article
Cite this article
Bernasconi, A., Ciriani, V., Luccio, F. et al. Synthesis of Autosymmetric Functions in a New Three-Level Form. Theory Comput Syst 42, 450–464 (2008). https://doi.org/10.1007/s00224-007-9009-6
Published:
Issue Date:
DOI: https://doi.org/10.1007/s00224-007-9009-6