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Synthesizing robust systems

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Abstract

Systems should not only be correct but also robust in the sense that they behave reasonably in unexpected situations. This article addresses synthesis of robust reactive systems from temporal specifications. Existing methods allow arbitrary behavior if assumptions in the specification are violated. To overcome this, we define two robustness notions, combine them, and show how to enforce them in synthesis. The first notion applies to safety properties: If safety assumptions are violated temporarily, we require that the system recovers to normal operation with as few errors as possible. The second notion requires that, if liveness assumptions are violated, as many guarantees as possible should be fulfilled nevertheless. We present a synthesis procedure achieving this for the important class of GR(1) specifications, and establish complexity bounds. We also present an implementation of a special case of robustness, and show experimental results.

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Notes

  1. We assume that illegal signal valuations are “skipped”, i.e., the DBWs remain in the same state. The question in which state to continue after an error will be addressed in Sect. 5.1.1.

  2. Note that the converse definition is more common. We use this definition as it allows for a smoother presentation of \(k\)-robustness.

  3. We use LTL here, instead of DBWs, for space reasons. Building the corresponding DBWs is trivial.

  4. While this is intuitively clear, refer to the proof of Lemma 14 in [13] for a formal argument.

  5. A DBW encodes a liveness property if it is complete but not all states are accepting. A DBW encodes a safety property if all states are accepting but the transition function is incomplete. A DBW which features both can easily be split.

  6. The reason is that conjunctions of Büchi conditions can easily be turned into Streett objectives, as will be shown later.

  7. Cf. Definition 8.

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Acknowledgments

This work was supported in part by the Austrian Science Fund (FWF) through the national research network RiSE (S11402-N23, S11406-N23, S11407-N23) and through Grant Nr. P23499-N23, by an ERC Start Grant (279307: Graph Games), by a Microsoft faculty fellows award, and by the European Research Council (ERC) through the Advanced Grant QUAREM (Quantitative Reactive Modeling).

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Authors and Affiliations

  1. Graz University of Technology, Inffeldgasse 16a, 8010 , Graz, Austria

    Roderick Bloem, Georg Hofferek, Bettina Könighofer & Robert Könighofer

  2. IST Austria, Am Campus 1, 3400 , Klosterneuburg, Austria

    Krishnendu Chatterjee & Thomas A. Henzinger

  3. NXP Semiconductors Austria, Mikronweg 1, 8101 , Gratkorn, Austria

    Karin Greimel

  4. Jasper Design Automaton and Ècole Polytechnique Fédérale de Lausanne, Station 14, 1015 , Lausanne, Switzerland

    Barbara Jobstmann

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  1. Roderick Bloem
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Correspondence to Robert Könighofer.

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Bloem, R., Chatterjee, K., Greimel, K. et al. Synthesizing robust systems. Acta Informatica 51, 193–220 (2014). https://doi.org/10.1007/s00236-013-0191-5

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