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The photon pipeline revisited

A hardware architecture to accelerate photon mapping

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Abstract

With the development of real-time ray tracing in recent years, it is now very interesting to ask if real-time performance can be achieved for high-quality rendering algorithms based on ray tracing. In this paper, we propose a pipelined architecture to implement reverse photon mapping. Our architecture can use real-time ray tracing to generate photon points and camera points, so the main challenge is how to implement the gathering phase that computes the final image. Traditionally, the gathering phase of photon mapping has only allowed coarse-grain parallelism, and this situation has been a source of inefficiency, cache thrashing, and limited throughput. To avail fine-grain pipelining and data parallelism, we arrange computations so that photons can be processed independently, similar to the way that triangles are efficiently processed in traditional real-time graphics hardware. We employ several techniques to improve cache behavior and to reduce communication overhead. Simulations show that the bandwidth requirements of this architecture are within the capacity of current and future hardware, and this suggests that photon mapping may be a good choice for real-time performance in the future.

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  1. Computer Science Department, University of California, Boelter Hall 4531-F, Los Angeles, 90095-1596, CA, USA

    Shawn Singh & Petros Faloutsos

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  1. Shawn Singh
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  2. Petros Faloutsos
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Correspondence to Shawn Singh.

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Singh, S., Faloutsos, P. The photon pipeline revisited. Visual Comput 23, 479–492 (2007). https://doi.org/10.1007/s00371-007-0123-x

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