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Hybrid on-chip soft computing model for performance evaluation of 6T SRAM cell using 45-nm technology

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Abstract

A hybrid on-chip approach based on the variants of soft computing techniques is proposed in this work to evaluate the performance metrics of a 6T static random access memory (SRAM) cell in 45-nm technology. The performance metric evaluated for the SRAM cell is the data retention voltage (DRV) with optimal memory requirements. Each of the SRAM memory cells intends the chip to possess low density but operates at high speed. This paper formulates a hybrid soft computing framework comprising a deep backpropagation neural network which trains the fuzzy inference system to determine the performance metrics of 6T SRAM cell. The weight and bias parameters of the deep learning neural framework are optimized through a cat swarm optimization algorithm so as to reduce the elapsed convergence time of the new hybrid soft computing model. Evaluation process is executed based on the driven outputs from deep learning model to the fuzzy inference system (FIS) module so as to achieve the best values of DRV. Data retention voltage plays a major role in reducing the substantial leakage current and static noise margin intends to retain the data without losing them. Deep backpropagation neural network gets trained with deep learning procedures and optimizes the rule parameters and membership parameters of the FIS design structure. The performance metric DRV under various constraints prove to be better and effective in comparison with the solutions from the existing literature works for the same configuration of 6T SRAM cell using 45-nm technology.

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Authors and Affiliations

  1. Department of Electronics and Communication Engineering, Muthayammal Engineering College (Autonomous), Rasipuram, Tamilnadu, 637408, India

    S. Selvarasu

  2. Department of Electrical and Electronics Engineering, Muthayammal Engineering College (Autonomous), Rasipuram, Tamilnadu, 637408, India

    S. Saravanan

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  1. S. Selvarasu
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Selvarasu, S., Saravanan, S. Hybrid on-chip soft computing model for performance evaluation of 6T SRAM cell using 45-nm technology. Soft Comput 24, 10785–10799 (2020). https://doi.org/10.1007/s00500-019-04581-4

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