Zusammenfassung
In diesem Artikel werden drei verschiedene Oszillatortopologien untersucht. Der Oszillator soll in einer vollständig digitalen Phase-Locked Loop eingesetzt werden, die zur Frequenzsynthese für die lizenzfreien ISM/SRD-Frequenzbänder bei 315,0 MHz, 433,9 MHz und 868,3 MHz verwendet wird. Der Frequenzbereich liegt zwischen 75 MHz und 80 MHz und soll mittels eines digitalen Codewortes einstellbar sein.
Summary
In this paper three different oscillator topologies are investigated. The oscillator is to be used in an all-digital phase-locked loop for frequency synthesis for the ISM/SRD license-free frequency bands at 315.0 MHz, 433.9 MHz and 868.3 MHz. The oscillator's frequency range is 75 MHz to 80 MHz and its frequency is controlled via a digital code word.
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References
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Unterassinger, H., Flatscher, M., Herndl, T. et al. Design of a digitally controlled oscillator for a Delta-Sigma phase-locked loop in a 0.13 µm CMOS-process. Elektrotech. Inftech. 127, 86–90 (2010). https://doi.org/10.1007/s00502-010-0726-1
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DOI: https://doi.org/10.1007/s00502-010-0726-1