Skip to main content
Log in

From 65 nm to 28 nm CMOS: design of analog building blocks of frontend channels for pixel sensors in high-energy physics experiments

Von 65 nm bis 28 nm CMOS: Design analoger Bausteine von Frontend-Kanälen für Pixelsensoren in Hochenergiephysik-Experimenten

  • Originalarbeit
  • Published:
e+i Elektrotechnik und Informationstechnik Aims and scope Submit manuscript

Abstract

The 28 nm CMOS process is the major commercial successor of the 65 nm one and widely used for the design of advanced application-specific integrated circuits (ASICs) in the field of instrumentation for radiation detectors in high-energy physics (HEP) experiments. The HEP community is now migrating to the 28 nm process for the design of readout electronics for pixel detectors and other mixed-signal circuits. In this work a comparison of the main device parameters, including noise, intrinsic gain and mismatch, will be presented for the two technologies. The design in 28 nm CMOS of basic analog building blocks for the development of pixel frontend channels will also be discussed. In particular, this work will be focused on the design of compact gain stages for the design of charge-sensitive amplifiers and on the development of fast- and low-power asynchronous comparators.

Zusammenfassung

Der 28 nm CMOS-Prozess ist der wichtigste kommerzielle Nachfolger des 65 nm-Prozesses. Dieser wird häufig für den Entwurf fortschrittlicher ASICs im Bereich der Instrumentierung für Strahlungsdetektoren in Experimenten der Hochenergiephysik (HEP) verwendet. Die HEP-Community migriert jetzt für das Design von Ausleseelektronik für Pixeldetektoren und andere Mixed-Signal-Schaltungen zum 28 nm-Prozess. In dieser Arbeit wird ein Vergleich der wichtigsten Geräteparameter, einschließlich Geräusche, intrinsischer Verstärkung und Abweichung, für die beiden Technologien vorgestellt. Außerdem wird das Design des 28 nm CMOS analoger Grundbausteine für die Entwicklung von Pixel-Frontend-Kanälen besprochen. Der Schwerpunkt dieser Arbeit liegt insbesondere auf der Gestaltung von kompakten Verstärkungsstufen für das Design ladungsempfindlicher Verstärker und darüber hinaus auf der Entwicklung schneller und stromsparender asynchroner Komparatoren.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8

Similar content being viewed by others

References

  1. Ratti L et al (2017) A front-end channel in 65 nm CMOS for pixel detectors at the HL-LHC experiment upgrades. IEEE Trans Nucl Sci 64(2):789–799

    Article  ADS  CAS  Google Scholar 

  2. Di Guglielmo G et al (2021) A reconfigurable neural network ASIC for detector front-end data compression at the HL-LHC. IEEE Trans Nucl Sci 68(8):2179–2186

    Article  ADS  Google Scholar 

  3. Wennlöfet H et al (2022) The tangerine project: development of high-resolution 65 nm silicon MAPS. Nucl Instrum Methods 1039:1–4

    Google Scholar 

  4. Dimitrievska A et al (2020) RD53A: A large-scale prototype chip for the phase II upgrade in the serially powered HL-LHC pixel detectors. Nucl Instrum Methods 958:1–4

    Article  Google Scholar 

  5. Rossi A et al (2022) The CMS tracker for the high luminosity LHC. Nucl Instrum Methods 1048:1–5

    Google Scholar 

  6. Gonella L et al (2023) The ATLAS ITk detector system for the Phase-II LHC upgrade. Nucl Instrum Methods 1045:1–4

    Article  Google Scholar 

  7. Abada A et al (2019) FCC-hh: the hadron Collider. Eur Phys J Spec Top 228:755–1107

    Article  Google Scholar 

  8. Resta F et al (2018) 28 nm Integrated Circuit for PIXel detector. Nucl Instrum Methods 904:140–148

    Article  ADS  CAS  Google Scholar 

  9. Bandi F et al (2023) Analog IP blocks in 28 nm CMOS for the high energy physics community: SLVS transmitter and receiver. J Instrum 18:C1039

    Article  Google Scholar 

  10. Bonaldo S et al (2020) Ionizing-radiation response and low-frequency noise of 28-nm MOSFETs at ultrahigh doses. IEEE Trans Nucl Sci 67(7):1302–1311

    Article  ADS  CAS  Google Scholar 

  11. Mattiazzo S et al (2017) Total Ionizing Dose effects on a 28 nm Hi‑K metal-gate CMOS technology up to 1 Grad. J Instrum 12:C2003

    Article  Google Scholar 

  12. Jespers P (2015) The gm/ID methodology, a sizing tool for low-voltage analog CMOS circuits. Springer

    Google Scholar 

  13. Pelgrom MJM et al (1998) Transistor matching in analog CMOS applications. Technical Digest of the International Devices Meeting 1998, pp 915–918

  14. Stolk PA et al (1998) Modeling statistical dopant fluctuations in MOS transistors. IEEE Trans Elect Dev 45(9):1960–1971

    Article  ADS  Google Scholar 

  15. Kinget PR (2007) Device mismatch: an analog design perspective. IEEE International Symposium on Circuits and Systems, pp 1245–1248

    Google Scholar 

  16. Baker RJ (2010) CMOS circuit design, layout, and simulation, 3rd edn. IEEE Press Series on Microelectronic Systems

    Book  Google Scholar 

  17. Krummenacher F (1991) Pixel detectors with local intelligence: an IC designer point of view. Nucl Instrum Methods 305(3):527–532

    Article  ADS  Google Scholar 

  18. Comer DJ et al (2004) The utility of the composite cascode in analog CMOS design. Int J Electron 91(8):491–502

    Article  Google Scholar 

  19. Träff H (1992) Novel Approach to High Speed CMOS Current Comparators. Elect Lett 28(3):310–312

    Article  ADS  Google Scholar 

Download references

Acknowledgements

The authors wish to acknowledge all the colleagues of the University of Bergamo and Pavia who helped to improve the quality of this paper with their useful suggestions.

Funding

This work was funded by the Italian Institute of Nuclear Physics.

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Gianluca Traversi.

Ethics declarations

Conflict of interest

The authors declare that they have no known competing financial interests or personal relationships that could have appeared to influence the work reported in this paper.

Additional information

Publisher’s Note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Traversi, G., Gaioni, L. & Galliani, A. From 65 nm to 28 nm CMOS: design of analog building blocks of frontend channels for pixel sensors in high-energy physics experiments. Elektrotech. Inftech. 141, 11–19 (2024). https://doi.org/10.1007/s00502-023-01198-2

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s00502-023-01198-2

Keywords

Schlüsselwörter

Navigation