Abstract
Limited battery power is a typical constraint in stand-alone embedded systems. One way to extend the battery lifetime is by reducing CPU power consumption. Because of the quadratic relationship between power consumption in CMOS circuits and CPU voltage, power reduction can be obtained by scaling down supply voltage, or dynamic voltage scaling. However, reducing supply voltage slows down CPU speed since supply voltage has a proportional relationship with CPU frequency. On the other hand, in any real-time embedded environment (especially hard real-time), timing constraints are critical. In this paper, we focus on dynamic energy reduction of tasks scheduled by rate monotonic (RM) algorithm in a hard real-time embedded environment. The RM algorithm preemptively schedules any set of periodic tasks by assigning higher priorities to frequent tasks. For any periodic task set that satisfies the CPU utilization bound, we determine the provably optimal scaling of the worst-case execution time of each task that consumes minimum dynamic energy while satisfying the utilization bound. As RM algorithm is widely used, we expect this work can lead to better energy reduction management and expectations.
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Acknowledgments
We wish to thank Drs. James Anderson and Sanjoy Baruah of University of North Carolina, Chapel Hill for pointing to the real workloads discussed in this paper and Dr. Adit D. Singh, Dept of Electrical and Computer Engineering, Auburn University for discussing issues related to power and frequency in CMOS circuits. We gratefully wish to thank and acknowledge the anonymous reviewers for providing valuable feedback. This research was supported in part by NSF grant # 0966278.
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Baskiyar, S., Huang, CC. & Tam, TY. Minimum energy consumption for rate monotonic scheduled tasks. Computing 98, 661–684 (2016). https://doi.org/10.1007/s00607-015-0475-4
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DOI: https://doi.org/10.1007/s00607-015-0475-4