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Knowledge-based single-tone digital filter implementation for DSP systems

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Abstract

The requirement for efficient digital signal processing (DSP) systems and its solutions increases highly over the last few years. DSP techniques as well as its algorithms are necessary for day to day life tool namely smartphone, set-top unit (STU), video and acoustic players, digital cameras, digital television, etc. This paper describes a comparative study on knowledge-based digital filter structure namely transposed form, direct form, and systolic array. To implement the parallel processing the systolic array structure is often used. A Goertzel algorithm is implemented in the field-programmable gate array (FPGA) Altera EP4CE115F29C7 device which is used to determine the discrete Fourier transform (DFT). Finally, filtering technique is implemented efficiently by dividing filter coefficients and data into odd and even which increases the computational speed. The computational speed and functional verification results are achieved by using MATLAB. The Altera DSP builder and Simulink are used for the implementation of Goertzel algorithm. The 64-tap systolic low-pass filter structures offer 213.97-μs-less delay than the transposed form, 1700 μs, and direct form, 3900 μs, structures. Similarly for 2048-tap low-pass filter using sub-filter offers 49.397-ms computational speed and direct filtering offers 53.257 ms.

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Authors and Affiliations

  1. Anna University, Chennai, India

    R. Seshadri

  2. Sakthi Mariamman Engineering College, Chennai, India

    S. Ramakrishnan

  3. Department of Computer Applications, Bharathiyar University, Coimbatore, India

    J. Satheesh Kumar

Authors
  1. R. Seshadri
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  2. S. Ramakrishnan
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  3. J. Satheesh Kumar
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Correspondence to R. Seshadri.

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Seshadri, R., Ramakrishnan, S. & Kumar, J.S. Knowledge-based single-tone digital filter implementation for DSP systems. Pers Ubiquit Comput 26, 319–328 (2022). https://doi.org/10.1007/s00779-019-01304-2

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  • DOI: https://doi.org/10.1007/s00779-019-01304-2

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