Abstract.
We examine the challenges presented by large-scale formal verification of industrial-size circuits, based on our experiences in verifying the class of all micro-operations executing on the floating-point division and square root unit of the Intel IA-32 Pentium®4 microprocessor. The verification methodology is based on combining human-guided mechanised theorem-proving with low-level steps verified by fully automated model-checking. A key observation in the work is the need to explicitly address the issues of proof design and proof engineering, i.e., the process of creating proofs and the craft of structuring and formulating them, as concerns on their own right.
Similar content being viewed by others
Author information
Authors and Affiliations
Additional information
Published online: 19 November 2002
Rights and permissions
About this article
Cite this article
Kaivola, R., Kohatsu, K. Proof engineering in the large: formal verification of Pentium®4 floating-point divider . STTT 4, 323–334 (2003). https://doi.org/10.1007/s10009-002-0081-6
Issue Date:
DOI: https://doi.org/10.1007/s10009-002-0081-6