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https://locus.ufv.br//handle/123456789/21696
Tipo: | Artigo |
Título: | Selection of formal verification heuristics for parallel execution |
Autor(es): | Nacif, Jose Augusto Safe, Georgia Penido Coelho Jr., Claudionor Vieira, Luiz Filipe M. Val, Celina Gomes Do Fernandes, Antonio Otavio |
Abstract: | Functional verification is “the” major designphase bottleneck for silicon productivity. Since functional verification is an NP-complete problem, it relies on a large number of heuristics with associated parameters (engines). With the advent of parallel processing, formal verification can be optimized by selecting the best n engines to run in parallel, increasing the chance of reaching successful termination of the verification task. In this paper, we will present a methodology to build engine estimators based on structural metrics and to select n engines to run in parallel. The methodology considers both engines’ estimated performance and engines’ correlation. Results confirmed that the methodology can be a very quick selection mechanism for parallelization of engines in order to increase the chance of running the best engines to solve the problem. |
Palavras-chave: | Formal verification Parallel processing Engine’ correlation Design structural metrics |
Editor: | International Journal on Software Tools for Technology Transfer |
Tipo de Acesso: | Springer Nature Switzerland AG. |
URI: | http://dx.doi.org/10.1007/s10009-011-0204-z http://www.locus.ufv.br/handle/123456789/21696 |
Data do documento: | 3-Jun-2011 |
Aparece nas coleções: | Artigos |
Arquivos associados a este item:
Arquivo | Descrição | Tamanho | Formato | |
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artigo.pdf Until 2100-12-31 | texto completo | 336,59 kB | Adobe PDF | Visualizar/Abrir ACESSO RESTRITO |
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