Abstract
As operation frequencies of the printed circuit boards (PCBs) increase in keeping with VLSI frequencies in the GHz domain, two independent serious problems occur in the PCB design. One is waveform distortion problem, or signal integrity (SI) degradation problem, in PCB traces. And the other is power-supply drop problem, or power integrity (PI) degradation problem, in PCB power planes. Those problems are barely able to be overcome on case-by-case empirical designs conventionally. In this paper we newly propose a design approach for each problem, both of which are based on the genetic algorithm. And we obtained improvement ratios of more than double compared with the both conventional designs for SI and PI degradations, respectively.
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Li MP (2007) Jitter, noise, and signal integrity at high-speed, Prentice Hall Signal Integrity Library
Bogatin E (2010) Signal and power integrity-simplified, Prentice Hall Signal Integrity Library
Smith LD (2001) Power plane SPICE models and simulated performance for materials and geometries. IEEE Trans Adv Packag 24(3):277–287
Acknowledgments
This research was partially supported by JSPS/KAKENHI Grant Number 26289114 in Japan, and VLSI Design and Education Center (VDEC), the University of Tokyo in collaboration with Synopsys, Inc. and Keysight (Agilent) Technologies Japan, Ltd.
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Yasunaga, M., Yoshihara, I. An evolutionary design methodology of printed circuit boards for high-speed VLSIs. Artif Life Robotics 21, 171–176 (2016). https://doi.org/10.1007/s10015-016-0266-9
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DOI: https://doi.org/10.1007/s10015-016-0266-9