Abstract
High-level synthesis, HLS is a technology to convert the software into the hardware automatically. It is expected as a technology that can greatly reduce the load of the hardware development. However, the current HLS that cannot convert the software not considered the hardware configuration into the optimum hardware. One of characteristics of the hardware to be considered is the burst transfer of memory access. In this paper, we evaluate the burst transfer with a subject of alpha blending processing as a theme. It is necessary to describe the program, so that the HLS tool can implicitly infer the burst transfer, because HLS tool does not have a pragma designating the burst transfer. We consider the description method of the program to infer the burst transfer and clarify the influence of read/write burst transfer on alpha blending.






Similar content being viewed by others
Explore related subjects
Discover the latest articles, news and stories from top researchers in related subjects.References
Karam R, Puri R, Bhunia S (2016) Energy-efficient adaptive hardware accelerator for text mining application Kernels. IEEE Trans Very Large Scale Integr Syst 24(12):3526–3537
Lin S-H, Chen P-Y, Lin Y-N (2017) Hardware design of low-power high-throughput sorting unit. IEEE Trans Comput 66(8):1383–1395
Mora-Gutiérrez JM, Jiménez-Fernández CJ, Valencia-Barrero M (2017) Multiradix trivium implementations for low-power IoT hardware. IEEE Trans Very Large Scale Integr Syst 25(12):3401–3405
Nane R, Sima V-M, Olivier B, Meeuws R, Yankova Y, Bertels K (2012) DWARV 2.0: a CoSy-based C-to-VHDL hardware compiler. In: Proceedings of 22nd international conference on field programmable logic and applications, Oslo, Norway, 29–31 August 2012, pp 619–622
Pilato C, Ferrandi F (2013) Bambu: a modular framework for the high level synthesis of memory-intensive applications. In: Proceedings of 23rd international conference on field programmable logic and application, Porto, Portugal, 2–4 September 2013, pp 1–4
Canis A, Choi J, Aldham M, Zhang V, Kammoona A, Anderson JH, Brown S, Czajkowski T (2011) LegUp: high-level synthesis for FPGA-based processor/accelerator systems. In: Proceedings of the 19th ACM/SIGDA international symposium on field programmable gate arrays, Monterey, CA, USA, 27 February–1 March 2011, pp 33–36
Yamagata Y, Yamawaki A (2018) A consideration to develop a high-level synthesizable software game library. In: Proceedings of the 6th IIAE international conference on industrial application engineering 2018, pp 202–205
Yamagata Y, Yamawaki A (2019) An evaluation of burst transfer inferred by a high-level synthesis tool. IEIE Trans Smart Process Comput 8(2):143–149. https://doi.org/10.5573/IEIESPC.2019.8.2.143
Author information
Authors and Affiliations
Corresponding author
Additional information
Publisher's Note
Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.
About this article
Cite this article
Yamagata, Y., Yamawaki, A. A performance evaluation of read/write burst transfer by high-level synthesizable software for the alpha blending processing. Artif Life Robotics 25, 253–257 (2020). https://doi.org/10.1007/s10015-020-00590-x
Received:
Accepted:
Published:
Issue Date:
DOI: https://doi.org/10.1007/s10015-020-00590-x