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Unrestricted vs restricted cut in a tableau method for Boolean circuits

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Abstract

This paper studies the relative efficiency of variations of a tableau method for Boolean circuit satisfiability checking. The considered method is a nonclausal generalisation of the Davis–Putnam–Logemann–Loveland (DPLL) procedure to Boolean circuits. The variations are obtained by restricting the use of the cut (splitting) rule in several natural ways. It is shown that the more restricted variations cannot polynomially simulate the less restricted ones. For each pair of methods T, T′, an infinite family \(\{\mathcal{C}_{n}\}\) of circuits is devised for which T has polynomial size proofs while in T′ the minimal proofs are of exponential size w.r.t. n, implying exponential separation of T and T′ w.r.t. n. The results also apply to DPLL for formulas in conjunctive normal form obtained from Boolean circuits by using Tseitin’s translation. Thus DPLL with the considered cut restrictions, such as allowing splitting only on the variables corresponding to the input gates, cannot polynomially simulate DPLL with unrestricted splitting.

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Authors and Affiliations

  1. Helsinki University of Technology, Laboratory for Theoretical Computer Science, P.O. Box 5400, FI-02015 TKK, Finland

    Matti Järvisalo, Tommi Junttila & Ilkka Niemelä

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  1. Matti Järvisalo
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  2. Tommi Junttila
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  3. Ilkka Niemelä
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Correspondence to Matti Järvisalo.

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AMS subject classification

03B70, 03F20, 68T15, 68T20

The financial support from Academy of Finland (project #53695) is gratefully acknowledged.

Tommi Junttila: This work was partially done while visiting ITC-IRST (Trento, Italy), and has been sponsored by the CALCULEMUS! IHP-RTN EC project, contract code HPRN-CT-2000-00102.

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Järvisalo, M., Junttila, T. & Niemelä, I. Unrestricted vs restricted cut in a tableau method for Boolean circuits. Ann Math Artif Intell 44, 373–399 (2005). https://doi.org/10.1007/s10472-005-7034-1

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  • DOI: https://doi.org/10.1007/s10472-005-7034-1

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