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An artifact detection scheme with CUDA-based image operations

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Abstract

Many image filtering techniques can be accelerated with compute unified device architecture (CUDA)-based massively parallel implementations. In this paper, we show the major issues on our acceleration techniques, and also its implementation details. We implemented various image filtering operations in our own CUDA kernel programs, and they are combined to build an artifact-detection scheme in PCB board soldering process. We designed our own computational logics on the artifact detection, and finally, the whole system figure out the potential artifact regions. Comparing with the central processing unit-based reference implementation, we show its correctness and feasibility, with much execution speed-ups.

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Acknowledgements

This research was supported by Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education, Science and Technology (Grant 2016R1D1A3B03935488). This study is partially based upon work supported by Koh Young Technology. The authors thank Mr. Woo-Seok Shin for the first stage experimental works.

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Authors and Affiliations

  1. School of Computer Science and Engineering, Kyungpook National University, Taegu, 41566, Republic of Korea

    Nakhoon Baek

  2. Dept. of Convergence Security, Kyonggi University, Suwon-si, 16227, Republic of Korea

    Kuinam J. Kim

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  1. Nakhoon Baek
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  2. Kuinam J. Kim
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Correspondence to Kuinam J. Kim.

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Baek, N., Kim, K.J. An artifact detection scheme with CUDA-based image operations. Cluster Comput 20, 749–755 (2017). https://doi.org/10.1007/s10586-017-0760-4

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  • DOI: https://doi.org/10.1007/s10586-017-0760-4

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