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SystemC co-simulation for core-based embedded systems

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Abstract

SystemC is becoming the reference language for hardware description in EDA community. It is suitable for describing hardware at several abstraction levels, and it can be used to develop devices for programmable, CPU-based, systems. In such a context, there are several requirements to meet. The hardware under development can be an extension module for an existing system, possibly with no knowledge on the actual system implementation. At the same time, the module to develop can be minded as a CPU-independent device that should be evaluated against different processors. Hence, the developer should leverage different techniques, depending on the development environment involved.

We present a framework that allows to co-simulate the hardware under development and the software, in a system extending context as well as in a CPU-centered design. Such a framework can use different abstraction levels for the hardware, thus allowing to meet the best accuracy/performance tradeoffs. Moreover, when required, the CPU can be replaced on the fly, keeping the software portion just marginally changed (or not modified at all), then realizing the required modularity of the design.

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Authors and Affiliations

  1. Dip. di Informatica, Università di Verona, 37134, Verona, Italy

    Franco Fummi & Giovanni Perbellini

  2. DAUIN, Politecnico di Torino, 10129, Torino, Italy

    Mirko Loghi & Massimo Poncino

Authors
  1. Franco Fummi
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  2. Mirko Loghi
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  3. Giovanni Perbellini
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  4. Massimo Poncino
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Correspondence to Franco Fummi.

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Fummi, F., Loghi, M., Perbellini, G. et al. SystemC co-simulation for core-based embedded systems. Des Autom Embed Syst 11, 141–166 (2007). https://doi.org/10.1007/s10617-007-9006-7

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  • DOI: https://doi.org/10.1007/s10617-007-9006-7

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