Skip to main content
SpringerLink
Log in

Algorithmic aspects for functional partitioning and scheduling in hardware/software co-design

  • Published:
Design Automation for Embedded Systems Aims and scope Submit manuscript

Abstract

Hardware/software (HW/SW) partitioning and scheduling are the crucial steps during HW/SW co-design. It has been shown that they are classical combinatorial optimization problems. Due to the possible sequential or concurrent execution of the tasks, HW/SW partitioning and scheduling has become more difficult to solve optimally. In this paper more efficient heuristic algorithms are proposed for the HW/SW partitioning and scheduling. The proposed algorithm partitions a task graph by iteratively moving the task with highest benefit-to-area ratio in higher priority. The benefit-to-area ratio is updated in each iteration step to cater for the task concurrence. The proposed algorithm for task scheduling executes the task lying in hardware-only critical path in higher priority to enhance the task forecast. A large body of experimental results conclusively shows that the proposed heuristic algorithm for partitioning is superior to the latest efficient combinatorial algorithm (Tabu search) cited in this paper. Moreover, the Tabu search for partitioning has been further improved by utilizing the proposed heuristic solution as its initial solution. In addition, the proposed scheduling algorithm obtains the improvements over the most widely used approaches by up to 10% without large increase in running time.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Similar content being viewed by others

References

  1. Ernst R, Henkel J, Benner T (1993) Hardware-software co-synthesis for micro-controllers. IEEE Des Test Comput 10(4):64–75

    Article  Google Scholar 

  2. Harkin J, McGinnity TM, Maguire LP (2000) Partitioning methodology for dynamically reconfigurable embedded systems. IEE Proc Comput Digit Tech 147(6):391–396

    Article  Google Scholar 

  3. Niemann R, Marwedel P (1996) Hardware/software partitioning using integer programming. In: Proc of IEEE/ACM European design automation conference (EDAC), pp 473–479

  4. Gupta R, Micheli GD (1993) Hardware-software cosynthesis for digital systems. IEEE Des Test Comput 10(3):29–41

    Article  Google Scholar 

  5. Vahid F, Gajski DD, Gong J (1994) A binary-constraint search algorithm for minimizing hardware during hardware/software partitioning. In: Proc of IEEE/ACM European design automation conference (EDAC), pp 214–219

  6. Vahid F, Gajski DD (1995) Clustering for improved system-level functional partitioning. In: Proc 8th IEEE/ACM int symp system synthesis, pp 28–33

  7. Quan G, Hu X, Greenwood GW (1999) Preference-driven hierarchical hardware/software partitioning. In: Proc of IEEE int conf on computer design, pp 652–657

  8. Srinivasan V, Radhakrishnan S, Vemuri R (1998) Hardware software partitioning with integrated hardware design space exploration. In: Proc of DATE’98, Paris, pp 28–35

  9. Niemann R, Marwedel P (1997) An algorithm for hardware/software partitioning using mixed integer linear programming. Des Autom Embed Syst 2(2):165–193. Special Issue: Partitioning Methods for Embedded Systems

    Article  Google Scholar 

  10. Weinhardt M (1999) Integer programming for partitioning in software oriented codesign. Lect Notes Comput Sci 975:227–234

    Google Scholar 

  11. Peng Z, Kuchcinski K (1993) An algorithm for partitioning of application specific system. In: Proc of IEEE/ACM European design automation conference (EDAC), pp 316–321

  12. Henkel J, Ernst R (2001) An approach to automated hardware/software partitioning using a flexible granularity that is driven by high-level estimation techniques. IEEE Trans Very Large Scale Integr (VLSI) Syst 9(2):273–289

    Article  Google Scholar 

  13. Karam SC, Ranga V (2002) Hardware-software partitioning and pipelined scheduling of transformative applications. IEEE Trans Very Large Scale Integr (VLSI) Syst 10(3):193–208

    Article  Google Scholar 

  14. Madsen J, Grode J, Knudsen PV, Petersen ME, Haxthausen A (1997) LYCOS: The Lyngby co-synthesis system. Des Autom Embed Syst 2:195–235

    Article  Google Scholar 

  15. Vallejo ML, Lopez JC (2003) On the hardware-software partitioning problem: system modeling and partitioning techniques. ACM Transact Des Automat Electron Syst 8(3):269–297

    Article  Google Scholar 

  16. Jigang W, Srikanthan T (2006) Low-complex dynamic programming algorithm for hardware/software partitioning. Inf Process Lett 98:41–46

    Article  Google Scholar 

  17. Galanis MD, Dimitroulakos G, Kakarountas AP, Goutis CE (2005) Speedups from partitioning software kernels to FPGA hardware in embedded SoCs. In: Proc IEEE workshop on signal processing systems-design and implementation, pp 485–490

  18. Lee JJ, Mooney VJ (2005) Hardware/software partitioning of operating systems: focus on deadlock detection and avoidance. IEE Proc Comput Digit Tech 152(2):167–182

    Article  Google Scholar 

  19. Daniel K, Natasha S (2005) Formal verification of system C by automatic hardware/software partitioning. In: Proc of third ACM and IEEE international conference on formal methods and models for co-design, pp 101–110

  20. Silva L, Sampaio A, Barros E (2004) A constructive approach to hardware/software partitioning. Form Methods Syst Des 24:45–90

    Article  MATH  Google Scholar 

  21. Kwok YK, Ahmad I (1999) Static scheduling algorithms for allocating directed task graphs to multiprocessors. ACM Comput Surv 31:406–471

    Article  Google Scholar 

  22. Leung JY-T (2004) Handbook of scheduling—algorithms, models, and performance analysis. CRC Press, Boca Raton

    MATH  Google Scholar 

  23. Liao G, Altman ER, Agarwal VK, Gao GR (1994) A Comparative Study of Multiprocessor List Scheduling Heuristics. In: International conference on system sciences, pp 68–77

  24. Chung YC, Ranka S (1992) Applications and performance analysis of a compile-time optimization approach for list scheduling algorithms on distributed memory multiprocessors. J Supercomput November:512–521

    Google Scholar 

  25. Silva ML, Porto SCS (1999) An object-oriented approach to a parallel tabu search algorithm for the task scheduling problem. In: International conference on computer science society, pp 105–111

  26. Grajcar M (2000) Conditional scheduling for embedded systems using genetic list scheduling. In: International symposium on system synthesis, pp 123–128

  27. Grajcar M (1999) Genetic list scheduling algorithm for scheduling and allocation on a loosely coupled heterogeneous multiprocessor system. In: Design automation conference, pp 280–285

  28. Shrivastava A, Kumar M (2000) Optimal hardware/software partitioning for concurrent specification using dynamic programming. In: International conference on VLSI design, pp 110–113

  29. Bakshi S, Gajski D (1999) Partitioning and pipelining for performance-constrained hardware/software system. IEEE Trans Very Large Scale Integr Syst 7(4):419–432

    Article  Google Scholar 

  30. Arato P, Mann ZA, Orban A (2005) Algorithmic aspects of hardware/software partitioning. ACM Transact Des Automat Electron Syst 10(1):136–156

    Article  MathSciNet  Google Scholar 

  31. Garey MR, Johnson DS (1979) Computers and intractability: a guide to the theory of np-completeness. Freeman, New York

    MATH  Google Scholar 

  32. Garey MR, Johnson DS (1975) Complexity results for multiprocessor scheduling under resource constraints. SIAM J Comput 4(4):397–411

    Article  MATH  MathSciNet  Google Scholar 

  33. French S (1982) Sequencing and scheduling an introduction to the mathematics of the job-shop. Ellis Horwood, Chichester

    MATH  Google Scholar 

  34. Axelsson J (1997) Architecture synthesis and partitioning of real-time systems: a comparison of three heuristic search strategies. In: IEEE international workshop on hardware/software codesign, pp 161–165

  35. Wiangtong T, Cheung PYK, Luk W (2002) Comparing three heuristic search methods for functional partitioning in hardware-software codesign. Des Autom Embed Syst 6:425–449

    Article  Google Scholar 

  36. Knudsen PV, Madsen J (1999) Integrating communication protocol selection with partitioning in hardware/software codesign. IEEE Trans CAD Integr Circuits Syst 18(8):1077–1095

    Article  Google Scholar 

  37. Geer D (2005) Chip makers turn to multicore processors. Computer 38(5):11–13

    Article  Google Scholar 

  38. Gorder PF (2007) Multicore processors for science and engineering. Comput Sci Eng 9(2):3–7

    Article  Google Scholar 

  39. Bauer L, Shafique M, Kramer S, Henkel J (2007) RISPP: rotating instruction set processing platform. In: Proceedings of the 44th annual conference on design automation (DAC’07), San Diego, CA, pp 791–796

  40. Srinivasan V, Govindarajan S, Vemuri R (2001) Fine-grained and coarse-grainedbehavioral partitioning with effective utilization of memory and design space exploration for multi-FPGA architectures. IEEE Trans Very Large Scale Integr (VLSI) Syst 9:140–158

    Article  Google Scholar 

  41. Balas E, Zemel E (1980) An algorithm for large zero-one knapsack problems. Oper Res 28:1130–1154

    Article  MATH  MathSciNet  Google Scholar 

  42. Martello S, Toth P (1990) Knapsack problems: algorithms and computer implementations. Wiley, New York

    MATH  Google Scholar 

  43. Pisinger D (1995) Algorithms for knapsack problems. PhD thesis, University of Copenhagen

  44. Beier R, Vocking B (2004) Probabilistic analysis of knapsack core algorithms. In: Proc of the 15-th annual ACM-SIAM symposium on discrete algorithms, Louisiana, pp 468–477

  45. Aho AV, Hopcroft JE, Ullman JD (1974) The design and analysis of computer algorithms. Addison-Wesley, Reading

    MATH  Google Scholar 

  46. Wang G, Gong W, Kastner R (2003) A new approach for task level computational resource bi-partitioning. In: Proc of int conf on parallel and distributed computing and systems (PDCS), vol 1(1), pp 439–444

  47. Kalavade A, Lee E (1994) A global criticality/local phase driven algorithm for the constrained hardware/software partitioning problem. In: IEEE international workshop on hardware/software codesign, pp 42–48

  48. Rayward-Smith VJ, Osman IH, Reeves CR, Smith GD (1996) Modern heuristic search methods. Wiley, New York

    MATH  Google Scholar 

  49. Coley DA (1998) An introduction to genetic algorithms for scientists and engineers. World Scientific, Singapore

    Google Scholar 

  50. Skadron K, Stan MR, Huang W et al. (2003) Temperature-aware micro architecture. In: Proceedings of the 30th international symposium on computer architecture (ISCA), San Diego, CA, pp 2–13

  51. Olukotun KA, Helaihel R, Levitt J, Ramirez R (1994) A software-hardware cosynthesis approach to digital system simulation. IEEE Micro 4:48–58

    Article  Google Scholar 

  52. Young-II K, Chong-Min K (2004) TPartition: testbench partitioning for hardwareaccelerated functional verification. IEEE Des Test Comput 21(6):484–493

    Article  Google Scholar 

  53. Young-II K, Wooseung Y, Young-Su K, Chong-Min K (2004) Communication-efficient hardware acceleration for fast functional simulation. In: Proceedings of design automation conference, pp 293–298

  54. Stitt G, Lysecky R, Vahid F (2003) Dynamic hardware/software partitioning: a first approach. In: Proceedings of design automation conference, pp 250–255

Download references

Author information

Authors and Affiliations

  1. Centre for High Performance Embedded Systems, Nanyang Technological University, Singapore, 639798, Singapore

    Wu Jigang, Thambipillai Srikanthan & Tao Jiao

Authors
  1. Wu Jigang
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Thambipillai Srikanthan
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Tao Jiao
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Wu Jigang.

Additional information

This work was presented in part at 2006 IEEE International Conference on Field Programmable Technology (ICFPT).

Rights and permissions

Reprints and permissions

About this article

Cite this article

Jigang, W., Srikanthan, T. & Jiao, T. Algorithmic aspects for functional partitioning and scheduling in hardware/software co-design. Des Autom Embed Syst 12, 345–375 (2008). https://doi.org/10.1007/s10617-008-9032-0

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s10617-008-9032-0

Keywords

Search

Navigation