Skip to main content

Advertisement

SpringerLink
Log in

A content-aware writing mechanism for reducing energy on non-volatile memory based embedded storage systems

  • Published:
Design Automation for Embedded Systems Aims and scope Submit manuscript

Abstract

Emerging byte-addressable non-volatile memory (NVM), such as phase change memory has many advantages in terms of low power consumption, high density, in-place update, and higher write endurance. Reducing the energy consumption of NVM is a fundamental issue when the technology is considered as an alternative to secondary storage in embedded systems. In the design of energy efficiency approaches, one of the most challenging problems is to reduce unnecessary write activities on NVM. In this paper, we present an optimal content-aware NVM memory writing mechanism, CA-NVM, to effectively select a free NVM page for each write request from file system to reduce write activities, since write activities account for most of energy consumption in NVM storage. In order to speed up the procedure of selecting a free page, we introduce a sampling mechanism, by which we only pick a few bits from the free page and the logical page to be written for comparison. Those sample bits of free pages are stored in a special area such that they can be indexed quickly. We conduct a series of experiments based on realistic traces, and the experimental results show that the proposed technique can reduce write activities up to \(36.03\,\%,\) and reduce energy consumption by \(21.3\,\%\) on average compared with a random based free-page allocation mechanism.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10
Fig. 11
Fig. 12
Fig. 13
Fig. 14
Fig. 15
Fig. 16
Fig. 17

Similar content being viewed by others

References

  1. Barroso L, Holzle U (2007) The case for energy-proportional computing. Computer 40(12):33–37

    Article  Google Scholar 

  2. Bedeschi F, Bonizzoni E, Casagrande G, Gastaldi R, Resta C, TorelliG, Zella D (2005) SET and RESET pulse characterization in BJT-selected phase-change memories. In: IEEE international symposium on circuits and systems, 2005. ISCAS 2005. IEEE, Kobe, Japan, pp 1270–1273

  3. Bez R, Atwood G (2006) Chalcogenide phase change memory: scalable nvm for the next decade? In: 21st Non-volatile semiconductor memory workshop, 2006. IEEE NVSMW 2006. IEEE, New York, pp 12–14

  4. Chen CH, Hsiu PC, Kuo TW, Yang CL, Wang CYM (2012) Age-based PCM wear leveling with nearly zero search cost. In: Proceedings of the 49th annual design automation conference, DAC ’12. ACM, New York, pp 453–458

  5. Chen X, Chen Y, Ma Z, Fernandes FC (2013) How is energy consumed in smartphone display applications? In: Proceedings of the 14th workshop on mobile computing systems and applications. ACM, Atlanta, p 3

  6. Cho S, Lee H (2009) Flip-n-write: a simple deterministic technique to improve pram write performance, energy and endurance. In: 42nd Annual IEEE/ACM international symposium on microarchitecture, 2009. MICRO-42, pp 347–357

  7. Choi Y, Song I, Park MH, Chung H, Chang S, Cho B, Kim J, Oh Y, Kwon D, Sunwoo J, Shin J, Rho Y, Lee C, Kang MG, Lee J, Kwon Y, Kim S, Kim J, Lee YJ, Wang Q, Cha S, Ahn S, Horii H, Lee J, Kim K, Joo H, Lee K, Lee YT, Yoo J, Jeong G (2012) A 20 nm 1.8 V 8 GB PRAM with 40 mb/s program bandwidth. In: 2012 IEEE international solid-state circuits conference digest of technical papers (ISSCC), pp 46–48

  8. Chung H, Jeong BH, Min B, Choi Y, Cho BH, Shin J, Kim J, Sunwoo J, min Park J, Wang Q, Lee YJ, Cha S, Kwon D, Kim S, Kim S, Rho Y, Park MH, Kim J, Song I, Jun S, Lee J, Kim K, won Lim K, ryul Chung W, Choi C, Cho H, Shin I, Jun W, Hwang S, Song KW, Lee K, whan Chang S, Cho WY, Yoo JH, Jun YH (2011) A 58 nm 1.8 V 1 GB PRAM with 6.4 mb/s program BW. In: 2011 IEEE international solid-state circuits conference digest of technical papers (ISSCC), pp 500–502

  9. Dhiman G, Ayoub R, Rosing T (2009) PDRAM: a hybrid PRAM and DRAM main memory system. In: Proceedings of the 46th annual design automation conference (DAC ’09), pp 664–669

  10. Dong X, Xie Y (2011) AdaMS: adaptive MLC/SLC phase-change memory design for file storage. In: 16th Asia and South Pacific design automation conference (ASP-DAC), 2011. IEEE, Yokohama, Japan, pp 31–36

  11. Ferreira A, Childers B, Melhem R, Mosse D, Yousif M (2010a) Using PCM in next-generation embedded space applications. In: 16th IEEE real-time and embedded technology and applications symposium (RTAS), 2010, pp 153–162

  12. Ferreira AP, Zhou M, Bock S, Childers B, Melhem R, Mossé D (2010b) Increasing PCM main memory lifetime. In: Proceedings of the conference on design, automation and test in Europe, DATE ’10. European Design and Automation Association, Leuven, pp 914–919

  13. Hu J, Xue CJ, Tseng WC, He Y, Qiu M, Sha EHM (2010a) Reducing write activities on non-volatile memories in embedded CMPs via data migration and recomputation. In: Proceedings of the 47th design automation conference (DAC ’10), pp 350–355

  14. Hu J, Xue CJ, Tseng WC, Zhuge Q, Sha EHM (2010b) Minimizing write activities to non-volatile memory via scheduling and recomputation. In: Proceedings of the 2010 IEEE symposium on application specific processors (SASP ’10)

  15. Hu J, Xue CJ, Zhuge Q, Tseng WC, Sha EHM (2013) Data allocation optimization for hybrid scratch pad memory with SRAM and nonvolatile memory. IEEE Trans VLSI Syst 21(6):1094–1102

    Article  Google Scholar 

  16. Lee K, Orailoglu A (2008) Application specific non-volatile primary memory for embedded systems. In: Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis. ACM, New York, pp 31–36

  17. Lee BC, Ipek E, Mutlu O, Burger D (2009) Architecting phase change memory as a scalable dram alternative. In: Proceedings of the 36th annual international symposium on Computer architecture (ISCA ’09), pp 2–13

  18. Li Y, Chen Y, Jones AK (2012) A software approach for combating asymmetries of non-volatile memories. In: Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design. ACM, New York, pp 191–196

  19. Li Q, Jiang L, Zhang Y, He Y, Xue CJ (2013) Compiler directed write-mode selection for high performance low power volatile PCM. In: Proceedings of the 14th ACM SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems. ACM, New York, pp 101–110

  20. Linbo L, Duo L, Jingtong H, Shouzhen G, Qingfeng Z, Edwin H-MS (2013) A space-based wear leveling for PCM-based embedded systems. In: Proceedings of the 19th IEEE international conference on embedded and real-time computing systems and applications (RTCSA 13)

  21. Mirhoseini A, Potkonjak M, Koushanfar F (2012) Coding-based energy minimization for phase change memory. In: Proceedings of the 49th annual design automation conference, DAC ’12. ACM, New York, pp 68–76

  22. Norton P (2006) DiskMon for Windows. http://www.technetmicrosoftcom/en-us/sysinternals/bb896646aspx. Accessed 16 Oct 2014

  23. Qureshi MK, Karidis J, Franceschini M, Srinivasan V, Lastras L, Abali B (2009a) Enhancing lifetime and security of PCM-based main memory with start-gap wear leveling. In: Proceedings of the 42nd annual IEEE/ACM international symposium on microarchitecture (MICRO ’09), pp 14–23

  24. Qureshi MK, Srinivasan V, Rivers JA (2009b) Scalable high performance main memory system using phase-change memory technology. In: Proceedings of the 36th annual international symposium on Computer architecture (ISCA ’09), pp 24–33

  25. Seong NH, Woo DH, Lee HHS (2010) Security refresh: prevent malicious wear-out and increase durability for phase-change memory with dynamically randomized address mapping. In: Proceedings of the 37th annual international symposium on Computer architecture, ISCA ’10, pp 383–394

  26. Sun G, Niu D, Ouyang J, Xie Y (2011) A frequent-value based PRAM memory architecture. In: Proceedings of the 16th Asia and South Pacific design automation conference. IEEE Press, Piscataway, pp 211–216

  27. Sun G, Zhang Y, Wang Y, Chen Y (2012a) Improving energy efficiency of write-asymmetric memories by log style write. In: Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design. ACM, New York, pp 173–178

  28. Sun Z, Chen X, Zhang Y, Li H, Chen Y (2012b) Nonvolatile memories as the data storage system for implantable ECG recorder. ACM J Emerg Technol Comput Syst 8(2):13

    Article  Google Scholar 

  29. Tianzheng W, Duo L, Zili S, Chengmo Y (2012) Write-activity-aware page table management for PCM-based embedded systems. In: International conference on proceedings of design automation conference (ASP-DAC), 2012. IEEE, Sydney, Australia, pp 317–322

  30. Wang J, Dong X, Sun G, Niu D, Xie Y (2011) Energy-efficient multi-level cell phase-change memory system with data encoding. In: 2011 IEEE 29th international conference on computer design (ICCD). IEEE, Amherst, pp 175–182

  31. Xu W, Liu J, Zhang T (2009) Data manipulation techniques to reduce phase change memory write energy. In: Proceedings of the 14th ACM/IEEE international symposium on low power electronics and design, ISLPED ’09. ACM, New York, pp 237–242

  32. Yang BD, Lee JE, Kim JS, Cho J, Lee SY, Yu BG (2007) A low power phase-change random access memory using a data-comparison write scheme. In: IEEE international symposium on circuits and systems, 2007. ISCAS 2007, pp 3014–3017

  33. Zeng H, Ellis CS, Lebeck AR, Vahdat A (2002) Ecosystem: managing energy as a first class operating system resource. ACM SIGPLAN Not 10:123–132

    Article  Google Scholar 

  34. Zhang W, Li T (2009) Characterizing and mitigating the impact of process variations on phase change based memory systems. In: Proceedings of the 42nd annual IEEE/ACM international symposium on microarchitecture. ACM, New York, pp 2–13

  35. Zhao M, Zhang H, Chen X, Chen Y, Xue CJ (2013) Online OLED dynamic voltage scaling for video streaming applications on mobile devices. In: 2013 International conference on hardware/software codesign and system synthesis (CODES+ ISSS). IEEE, Montreal, Canada, pp 1–10

  36. Zhou P, Zhao B, Yang J, Zhang Y (2009) Energy reduction for STT-RAM using early write termination. In: IEEE/ACM international conference on computer-aided design—digest of technical papers, 2009. ICCAD 2009. IEEE, Prague, pp 264–268

Download references

Acknowledgments

This work is partially supported by National 863 Program 2013AA013202, Chongqing High-Tech Research Program csct2012ggC40005, NSFC 61472052, NSFC 61173014.

Author information

Authors and Affiliations

  1. College of Computer Science, Chongqing University, Chongqing, China

    Jian Li, Qingfeng Zhuge, Duo Liu, Huizhang Luo & Edwin H.-M. Sha

  2. Key Laboratory of Dependable Service Computing in Cyber Physical Society, Ministry of Education, Chongqing, 400044, China

    Qingfeng Zhuge, Duo Liu & Edwin H.-M. Sha

Authors
  1. Jian Li
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Qingfeng Zhuge
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Duo Liu
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Huizhang Luo
    View author publications

    You can also search for this author in PubMed Google Scholar

  5. Edwin H.-M. Sha
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Qingfeng Zhuge.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Li, J., Zhuge, Q., Liu, D. et al. A content-aware writing mechanism for reducing energy on non-volatile memory based embedded storage systems. Des Autom Embed Syst 17, 711–737 (2013). https://doi.org/10.1007/s10617-014-9150-9

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s10617-014-9150-9

Keywords

Search

Navigation