Skip to main content
Log in

Dealing with practical limitations of distributed timed model checking for timed automata

  • Original Paper
  • Published:
Formal Methods in System Design Aims and scope Submit manuscript

Abstract

Two base algorithms are known for reachability verification over timed automata. They are called forward and backwards, and traverse the automata edges using either successors or predecessors. Both usually work with a data structure called Difference Bound Matrices (DBMs). Although forward is better suited for on-the-fly construction of the model, the one known as backwards provides the basis for the verification of arbitrary formulae of the TCTL logic, and more importantly, for controller synthesis. Zeus is a distributed model checker for timed automata that uses the backwards algorithm. It works assigning each automata location to only one processor. This design choice seems the only reasonable way to deal with some complex operations involving many DBMs in order to avoid huge overheads due to distribution. This article explores the limitations of Zeus-like approaches for the distribution of timed model checkers.

Our findings justify why close-to-linear speedups are so difficult –and sometimes impossible– to achieve in the general case. Nevertheless, we present mechanisms based on the way model checking is usually applied. Among others, these include model-topology-aware partitioning and on-the-fly workload redistribution. Combined, they have a positive impact on the speedups obtained.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5

Similar content being viewed by others

Notes

  1. Not to be confused with the region graph presented in [6].

  2. A formal description of the architecture including state machines and transducers can be found in [32].

  3. Unluckily \(\tt{ParM{E}T{I}S}\) does not handle disconnected graphs, so the trick of disregarding the edges can't be used.

  4. In this type of observers, reachability of a distinguished location implies the existence of a run of the SUA that matches a given event scenario and hence violates some safety property.

References

  1. Aceto L, Burgueño A, Larsen KG (1998) Model checking via reachability testing for timed automata. In: Tools and Algorithms for Construction and analysis of systems (TACAS '98), pp 263–280

  2. Alfonso A, Braberman V, Kicillof N, Olivero A (2004) Visual timed event scenarios. In: Proc. of the 26th ACM/IEEE international conference on software engineering

  3. Altisen K, Tripakis S (2002) Tools for controller synthesis of timed systems. In: RT-TOOLs

  4. Alur R, Courcoubetis C, Dill D, Halbwachs N, Wong-Toi H (1992) An implementation of three algorithms for timing verification based on automata emptiness. In: Proceedings of the 13th IEEE real-time systems symposium, Phoenix, Arizona. pp 157–166

  5. Alur R, Courcoubetis C, Dill DL (1993) Model-checking in dense real-time. Inform Comp 104(1):2–34

    Google Scholar 

  6. Alur R, Dill DL (1994) A theory of timed automata. Theor Comp Sci 126(2):183–235

    Google Scholar 

  7. Barnat J, Brim L, Stríbřná J (2001) Distributed LTL model-checking in SPIN. In: Dwyer MB (eds) Proc. of the 8th international SPIN workshop, Toronto, Canada, pp 200–216

  8. Behrmann G (2005) Distributed reachability analysis in timed automata. Int J Softw Tools Technol Transf 7(1):19–30

    Google Scholar 

  9. Behrmann G, Hune T, Vaandrager FW (2000) Distributing timed model checking—how the search order matters. In: Computer aided verification, vol. 1855 of LNCS, pp 216–231

  10. Ben-David S, Heyman T, Grumberg O, Schuster A (2000) Scalable distributed on-the-fly symbolic model checking. In: Formal methods in computer-aided design, pp 390–404

  11. Bengtsson J, Larsen KG, Larsson F, Pettersson P, Yi W (1995) UPPAAL—a tool suite for automatic verification of real-time systems. In: Hybrid systems, pp 232–243

  12. Bollig B, Leucker M, Weber M (2001) Parallel model checking for the alternation free μ-calculus. In: 7th international conference on tools and algorithms for the construction and analysis of systems (TACAS '01), Vol 2031 of LNCS, pp 543–558

  13. Bozga M, Daws C, Maler O, Olivero A, Tripakis S, Yovine S (1998) Kronos: A model-checking tool for real-time systems. In: Proc. of the 10th Intl. Conf. CAV '98, Vol 1427 of LNCS, pp 546–550

  14. Braberman V (2000) Modeling and checking real-time systems designs. Phd. thesis, Departamento de Computación, Facultad de Ciencias Exactas y Naturales, Universidad de Buenos Aires

  15. Braberman V, Garbervetsky D, Olivero A (2004a) ObsSlice: A timed automata slicer based on observers. In: Proc of the 16th Intl Conf CAV '04

  16. Braberman V, Olivero A, Schapachnik F (2002) Zeus: A distributed timed model checker based on Kronos. In: 1st workshop on parallel and distributed model checking, affiliated to CONCUR 2002 (13th International Conference on Concurrency Theory), Vol 68 of ENTCS. Brno, Czech Republic

  17. Braberman V, Olivero A, Schapachnik F (2004b) Issues in distributed model-checking of timed automata: building Zeus. Int J Softw Tools Technol Transf p. Online First

  18. Braberman V, Olivero A, Schapachnik F (2004c) On-the-fly workload prediction and redistribution in the distributed timed model checker Zeus. In: 3rd international workshop on parallel and distributed methods in verification, affiliated to CONCUR 2004 (15th International Conference on Concurrency Theory), London, UK

  19. Cousot P (1978) Methodes Iteratives de Construction et D'Aproximation de Points Fixes D'Operateurs Monotones sur un Treillis, Analyse Semantique des Programmes. Ph d. thesis, Université Scientifique et Médicale de Grenoble, Institut National Polytechnique de Grenoble

  20. Daws C, Yovine S (1996) Reducing the number of clock variables of timed automata. Proceedings IEEE Real-Time Systems Symposium (RTSS '96), pp 73–81

  21. Dill DL (1990) Timing assumptions and verification of finite-state concurrent systems. In: International workshop of automatic verification methods for finite state systems, Vol. 407 of LNCS, Grenoble, France, pp 197–212

  22. Garavel H, Mateescu R, Smarandache IM (2001) Parallel state space construction for model-checking. In: Dwyer MB (ed) Proc. of the 8th International SPIN Workshop. Toronto, Canada, pp 217–234

  23. Grumberg O, Heyman T, Schuster A (2001) Distributed symbolic model checking for μ-calculus. In: Computer aided verification, pp 350–362

  24. Heljanko K, Khomenko V, Koutny M (2002) Parallelisation of the petri net unfolding algorithm. In: Tools and algorithms for construction and analysis of systems (TACAS '02), pp 371–385

  25. Henzinger TA, Nicollin X, Sifakis J, Yovine S (1994) Symbolic model checking for real-time systems. Inform Comput 111(2):193–244

    Google Scholar 

  26. Heyman T, Geist D, Grumberg O, Schuster A (2002) Achieving scalability in parallel reachability analysis of very large circuits. Form Meth Syst Des 21(2):317–338

    Google Scholar 

  27. Krcal P (2003) Distributed explicit bounded LTL model checking. In: Brim L, Grumberg O (eds) Electronic notes in theoretical computer science, vol. 89 of ENTCS

  28. Lerda F, Sisto R (1999) Distributed-memory model checking with SPIN. In: Proc. of the 5th International SPIN Workshop, Vol. 1680 of LNCS

  29. Nicol DM, Ciardo G (1997) Automated parallelization of discrete state-space generation. J Parallel Distr Comp 47(2):153–167

    Google Scholar 

  30. Pnueli A (2005) Extracting controllers for timed automata. Technical report, Department of Computer Science, Weizmann Institute of Science

  31. Ranjan R, Sanghavi J, Brayton R, Sangiovanni-Vincentelli A (1996) Binary decision diagrams on network of workstations. In: International conference on computer design, pp 358–364

  32. Schapachnik F (2002) Distributed and parallel verification of real-time systems. Degree thesis, Departamento de Computación, Facultad de Ciencias Exactas y Naturales, Universidad de Buenos Aires

  33. Schloegel K, Karypis G, Kumar V (2000) A unified algorithm for load-balancing adaptive scientific simulations. Technical report, University of Minnesota, Department of Computer Science/US Army HPC Research Center. Minneapolis, USA

  34. Stern U, Dill DL (1997) Parallelizing the Murϕ verifier. In: Computer aided verification, vol 1254 of LNCS, pp 256–278

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to V. Braberman.

Additional information

This research paper supported by BID OC/AR PICT 11738 grant.

V. Braberman: Research supported by UBACyT 2004 X020.

A. Olivero: Partially supported by UADE projects TSI04B and PI0509.

F. Schapachnik: Partially supported by an IDS 2003 grant.

Rights and permissions

Reprints and permissions

About this article

Cite this article

Braberman, V., Olivero, A. & Schapachnik, F. Dealing with practical limitations of distributed timed model checking for timed automata. Form Method Syst Des 29, 197–214 (2006). https://doi.org/10.1007/s10703-006-0012-3

Download citation

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s10703-006-0012-3

Keywords

Navigation