Skip to main content
SpringerLink
Log in

Exploiting interleaving semantics in symbolic state-space generation

  • Published:
Formal Methods in System Design Aims and scope Submit manuscript

Abstract

Symbolic techniques based on Binary Decision Diagrams (BDDs) are widely employed for reasoning about temporal properties of hardware circuits and synchronous controllers. However, they often perform poorly when dealing with the huge state spaces underlying systems based on interleaving semantics, such as communications protocols and distributed software, which are composed of independently acting subsystems that communicate via shared events.

This article shows that the efficiency of state-space exploration techniques using decision diagrams can be drastically improved by exploiting the interleaving semantics underlying many event-based and component-based system models. A new algorithm for symbolically generating state spaces is presented that (i) encodes a model’s state vectors with Multi–valued Decision Diagrams (MDDs) rather than flattening them into BDDs and (ii) partitions the model’s Kronecker–consistent next–state function by event and subsystem, thus enabling multiple lightweight next–state transformations rather than a single heavyweight one. Together, this paves the way for a novel iteration order, called saturation, which replaces the breadth–first search order of traditional algorithms. The resulting saturation algorithm is implemented in the tool SMART, and experimental studies show that it is often several orders of magnitude better in terms of time efficiency, final memory consumption, and peak memory consumption than existing symbolic algorithms.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Similar content being viewed by others

References

  1. Alur R, Brayton R, Henzinger T, Qadeer S, Rajamani S (2001) Partial-order reduction in symbolic state-space exploration. Formal Methods Syst Design 18:97–116

    Article  MATH  Google Scholar 

  2. Barner S, Rabinovitz I (2003) Efficient symbolic model checking of software using partial disjunctive partitioning. In Correct Hardware Design and Verification Methods, LNCS 2860, Springer-Verlag, pp 35–50

  3. Bryant RE (1986) Graph-based algorithms for boolean function manipulation. IEEE Trans Comp 35(8):677–691

    MATH  Google Scholar 

  4. Burch JR, Clarke EM, McMillan KL, Dill DL, Hwang L (1992) Symbolic model checking: 1020 states and beyond. Inf Comput 98(2):142–170

    Article  MATH  MathSciNet  Google Scholar 

  5. Burch JR, Clarke EM, Long DE (1991) Symbolic model checking with partitioned transition relations. In Very Large Scale Integration. IFIP Transactions, North-Holland, pp 49–58

  6. Burch JR, Clarke EM, Long DE, McMillan KL, Dill DL (1994) Symbolic model checking for sequential circuit verification. IEEE Trans Comput-Aided Design Integrated Circuits Syst 13(4):401–424

    Article  Google Scholar 

  7. Cabodi G, Camurati P, Quer S (1999) Improving symbolic traversals by means of activity profiles. In Design Automation Conference. IEEE Comp Soc Press, pp 306–311

  8. Ciardo G, Jones RL, Miner AS, Siminiceanu R (2003) Logical and stochastic modeling with SMART. In Modeling Techniques and Tools for Computer Performance Evaluation, LNCS 2794. Springer-Verlag, pp 78–97

  9. Ciardo G, Lüttgen G, Siminiceanu R (2000) Efficient symbolic state-space construction for asynchronous systems. In Applications and Theory of Petri Nets, LNCS 1825. Springer-Verlag, pp 103–122

  10. Ciardo G, Lüttgen G, Siminiceanu R (2001) Saturation: An efficient iteration strategy for symbolic state space generation. In Tools and Algorithms for the Construction and Analysis of Systems, LNCS 2031. Springer-Verlag, pp 328–342

  11. Ciardo G, Marmorstein R, Siminiceanu R (2003) Saturation unbound. In Tools and Algorithms for the Construction and Analysis of Systems, LNCS 2619. Springer-Verlag, pp 379–393

  12. Ciardo G, Siminiceanu R (2003) Structural symbolic CTL model checking of asynchronous systems. In Computer-Aided Verification, LNCS 2725. Springer-Verlag, pp 40–53

  13. Ciardo G, Siminiceanu R (2002) Using edge-valued decision diagrams for symbolic generation of shortest paths. In Formal Methods in Computer-Aided Design, LNCS 2517. Springer-Verlag, pp 256–273

  14. Ciardo G, Trivedi KS (1993) A decomposition approach for stochastic reward net models. Performance Evaluation 18(1):37–59

    Article  MATH  MathSciNet  Google Scholar 

  15. Cimatti A, Clarke EM, Giunchiglia F, Roveri M (1999) NuSMV: A new Symbolic Model Verifier. In Computer-Aided Verification, LNCS 1633. Springer-Verlag, pp 495–499

  16. Clarke EM, Grumberg O, Peled DA (1999) Model Checking. MIT Press

  17. Dolev D, Klawe M, Rodeh M (1982) An O(n log n) unidirectional distributed algorithm for extrema finding in a circle. J Algorithms 3(3):245–260

    Article  MATH  MathSciNet  Google Scholar 

  18. Ezekiel J, Lüttgen G (2006) Can Saturation be parallelised? On the parallelisation of a symbolic state-space generator. In Parallel and Distributed Methods in Verification, LNCS. Springer-Verlag, To appear.

  19. Fernandes P, Plateau B, Stewart WJ (1998) Efficient descriptor-vector multiplication in stochastic automata networks. J ACM 45(3):381–414

    Article  MATH  MathSciNet  Google Scholar 

  20. Fujita M, Fujisawa H, Matsunaga Y (1993) Variable ordering algorithms for ordered binary decision diagrams and their evaluation. IEEE Trans Comput-Aided Design Integrated Circuits Syst 12(1):6–12

    Article  Google Scholar 

  21. Geldenhuys J, Valmari A (2001) Techniques for smaller intermediary BDDs. In Concurrency Theory, LNCS 2154. Springer-Verlag, pp 233–247

  22. Graf S, Steffen B, Lüttgen G (1996) Compositional minimisation of finite state systems using interface specifications. Formal Aspects Comput 8(5):607–616

    Article  MATH  Google Scholar 

  23. Holzmann G (2003) The Spin Model Checker: Primer and Reference Manual. Addison Wesley

  24. Kam T, Villa T, Brayton R, Sangiovanni-Vincentelli A (1998) Multi-valued decision diagrams: Theory and applications. Multiple-Valued Logic 4(1–2):9–62

    MATH  MathSciNet  Google Scholar 

  25. Kemper P (1996) Numerical analysis of superposed GSPNs. IEEE Trans. Software Eng. 22(4):615–628

    Article  MathSciNet  Google Scholar 

  26. Kimura S, Clarke EM (1990) A parallel algorithm for constructing binary decision diagrams. In Computer Design. IEEE Comp Soc Press, pp 220–223

  27. McMillan KL (1992) Symbolic model checking: An approach to the state explosion problem. PhD thesis, Carnegie Mellon University. CMU–CS–92–131

  28. Miner AS (2006) Saturation for a general class of models. IEEE Trans Software Eng 32(8):559–570

    Article  Google Scholar 

  29. Miner AS, Ciardo G (1999) Efficient reachability set generation and storage using decision diagrams. In Applications and Theory of Petri Nets, LNCS 1639. Springer-Verlag, pp 6–25

  30. Murata T (1989) Petri Nets: Properties, analysis and applications. Proc IEEE 77(4):541–579

    Article  Google Scholar 

  31. Narayan A, Isles AJ, Jain J, Brayton RK, Sangiovanni-Vincentelli A (1997) Reachability analysis using Partitioned-ROBDDs. In Computer-Aided Design. ACM and IEEE Comp Soc Press, pp 388–393

  32. Pastor E, Roig O, Cortadella J, Badia R (1994) Petri net analysis using boolean manipulation. In Applications and Theory of Petri Nets, LNCS 815. Springer-Verlag, pp 416–435

  33. Plateau B (1985) On the stochastic structure of parallelism and synchronisation models for distributed algorithms. In ACM SIGMETRICS. ACM, pp 147–153

  34. Ravi K, Somenzi F (1999) Hints to accelerate symbolic traversal. In Correct Hardware Design and Verification Methods, LNCS 1703. Springer-Verlag, pp 250–264

  35. Roig O, Cortadella J, Pastor E (1995) Verification of asynchronous circuits by BDD-based model checking of Petri nets. In Applications and Theory of Petri Nets, LNCS 935. Springer-Verlag, pp 374–391

  36. Sanders WH, Malhis LM (1992) Dependability evaluation using composed SAN-based reward models. J Parallel Distributed Comput 15(3):238–254

    Article  Google Scholar 

  37. Somenzi F (2001) CUDD: CU Decision Diagram Package, Release 2.3.1. University of Colorado at Boulder.

  38. Tilgner M, Takahashi Y, Ciardo G (1996) SNS 1.0: Synchronized Network Solver. In Manufacturing and Petri Nets, pp 215–234

  39. Valmari A (1990) A stubborn attack on the state explosion problem. In Computer-Aided Verification. AMS, pp 25–42

  40. Yoneda T, Hatori H, Takahara A, Minato S-I (1996) BDDs vs. zero-suppressed BDDs for CTL symbolic model checking of Petri nets. In Formal Methods Comput Aided Design, LNCS 1166. Springer-Verlag, pp 435–449

Download references

Author information

Authors and Affiliations

  1. Department of Computer Science and Engineering, University of California, Riverside, CA, USA

    Gianfranco Ciardo

  2. Department of Computer Science, University of York, Heslington, York, UK

    Gerald Lüttgen

  3. Department of Computer Science, Iowa State University, Ames, IA, USA

    Andrew S. Miner

Authors
  1. Gianfranco Ciardo
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Gerald Lüttgen
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Andrew S. Miner
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Gianfranco Ciardo.

Rights and permissions

Reprints and permissions

About this article

Cite this article

Ciardo, G., Lüttgen, G. & Miner, A.S. Exploiting interleaving semantics in symbolic state-space generation. Form Methods Syst Des 31, 63–100 (2007). https://doi.org/10.1007/s10703-006-0033-y

Download citation

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s10703-006-0033-y

Keywords

Search

Navigation