To the electronic circuit designer one of the most attractive features of evolutionary electronics is the possibility of exploring the design space far more widely than is possible with conventional design methods. In the last 10 years remarkable progress has been made on the use of evolutionary algorithms in solving a variety of difficult design problems in areas such as self-adaptive systems and reconfigurable robots.

“Introduction to Evolvable Hardware” takes us through each feature of this exciting area from the fundamentals of evolutionary computation to the intricacies of fault tolerant systems.

The authors present the principles of Evolvable HardWare (EHW) in a pleasant yet precise way with the authority of those who have published extensively in the area.

At the end of the preface, the authors argue that the motivation behind the book comes from the realization that all of the knowledge about evolvable hardware is scattered in a variety of journal articles and conference proceedings. As someone trying to teach the subject, I heartily agree with them.

The book contains six chapters. Chapter 1 contains a brief overview of the area where the main concepts are discussed. Through instructive examples, the authors identify several situations where evolutionary techniques might have advantages over conventional designs. Distinctions between evolvable/evolved and intrinsic/extrinsic evolution are given. Chapter 2 presents the basics of evolutionary computation describing its major components: representation, variation (mutation and recombination), evaluation and selection, population and termination criteria. This organization is reader friendly, facilitating the comprehension of each component of the evolutionary process. Chapter 3 describes the basic architectures and the major hardware platforms used in the design of reconfigurable digital systems. Chapter 3 is devoted to the implementation of reconfigurable digital devices, principally FPGAs. It shows the difficulties in digital silicon-based evolutionary systems are due to the absence of architectures able to implement a wide range of biological mechanisms. While FPGAs are general purpose reprogrammable devices for digital circuit applications, they have several limitations if used with bio-inspired design. These limitations, which the POEtic tissue architecture intends to solve, include poor reconfigurability, lack of multi-cellular scalable structures, the difficulty of implementing phylogenetic, ontogenetic and epigenetic mechanisms, single layered hardware organization and lack of support for massive I/O interaction with the external environment.

Chapter 4 covers one of the most promising topics in adaptive systems: the design of reconfigurable analog devices. The behavior of analog circuits is usually a complex non-linear combination of its topology and component values. This means analog circuit synthesis is often highly epistatic. Analog reconfigurable architectures must be able to synthesize simultaneously the topology and the component values of a circuit. For this reason, in the analog domain, only a small number of architectures have been successfully implemented so far. The authors divide them into two main groups: transistors and analog arrays. The transistor-based solutions, due to their inherent complexity, are covered in detail. However, for analog arrays, only a brief overview of ispPAC, a Commercial Off-The-Shelf (COTS) device is given.

Chapter 5 is the book’s pièce de résistance. It focuses on EHW-based fault recovery systems. It is comprised of a number of practical examples and contains a wide list of references. Chapter 5 starts by defining the terminology of the field and providing the foundation for fault tolerant design. The authors follow up this introduction with a valuable discussion of the timing constraints involved in the design of fault recovery systems. A useful equation is deduced to quantify the total intrinsic reconfiguration time for an Evolutionary Algorithm (EA). It is difficult to decide, from the equation, the number of EA generations. Therefore, the authors propose that the designer determines the fault recovery time using a typical method employed to minimize unexpected system failures. The designer should then use their equation to calculate how many generations are available to perform the intrinsic reconfiguration. Next Greenwood and Tyrrell describe their own fault recovery and robot control experiments. Chapter 5 concludes with two more examples. The first one uses the POEtic tissue concept to simulate an embryonic cellular fault tolerant mechanism. The second proposes a digital hardware model to emulate embryo development.

Finally, Chapter 6 contains a roadmap for future developments. It focuses on two main EHW topics identified in Chapter 1: circuit synthesis and circuit adaptation. The first covers possible circuit synthesis applications for EHW in analog and digital domains. Analog synthesis still does not have tools as mature as its digital counterpart. Therefore, it remains as an open area for more detailed investigation. There are an almost unlimited number of applications of adaptive circuits

The authors are to be congratulated on a particularly attractive set of well-organized subjects describing state-of-the-art research in the evolvable hardware domain. This is admirable considering the amount of information being dispensed. In conclusion, the book can be read with profit by anyone wanting to learn how to design self-adaptive systems in a coherent and clear way.