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Accelerating floating-point fitness functions in evolutionary algorithms: a FPGA-CPU-GPU performance comparison

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Abstract

Many large combinatorial optimization problems tackled with evolutionary algorithms often require very high computational times, usually due to the fitness evaluation. This fact forces programmers to use clusters of computers, a computational solution very useful for running applications of intensive calculus but having a high acquisition price and operation cost, mainly due to the Central Processing Unit (CPU) power consumption and refrigeration devices. A low-cost and high-performance alternative comes from reconfigurable computing, a hardware technology based on Field Programmable Gate Array devices (FPGAs). The main objective of the work presented in this paper is to compare implementations on FPGAs and CPUs of different fitness functions in evolutionary algorithms in order to study the performance of the floating-point arithmetic in FPGAs and CPUs that is often present in the optimization problems tackled by these algorithms. We have taken advantage of the parallelism at chip-level of FPGAs pursuing the acceleration of the fitness functions (and consequently, of the evolutionary algorithms) and showing the parallel scalability to reach low cost, low power and high performance computational solutions based on FPGA. Finally, the recent popularity of GPUs as computational units has moved us to introduce these devices in our performance comparisons. We analyze performance in terms of computation times and economic cost.

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Acknowledgments

This work was partially funded by the Spanish Ministry of Science and Innovation and ERDF (the European Regional Development Fund), under the contract TIN2008-06491-C04-04 (the MSTAR project).

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Authors and Affiliations

  1. Department of Technologies of Computers and Communications, University of Extremadura, 10003, Caceres, Spain

    Juan A. Gomez-Pulido, Miguel A. Vega-Rodriguez & Juan M. Sanchez-Perez

  2. Department of Computer Science, School of Technology and Management, Polytechnic Institute of Leiria, 2410, Leiria, Portugal

    Silvio Priem-Mendes & Vitor Carreira

Authors
  1. Juan A. Gomez-Pulido
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  2. Miguel A. Vega-Rodriguez
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  3. Juan M. Sanchez-Perez
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Correspondence to Juan A. Gomez-Pulido.

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Gomez-Pulido, J.A., Vega-Rodriguez, M.A., Sanchez-Perez, J.M. et al. Accelerating floating-point fitness functions in evolutionary algorithms: a FPGA-CPU-GPU performance comparison. Genet Program Evolvable Mach 12, 403–427 (2011). https://doi.org/10.1007/s10710-011-9137-2

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