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Dense Gaussian Networks: Suitable Topologies for On-Chip Multiprocessors

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This paper explores the suitability of dense circulant graphs of degree four for the design of on-chip interconnection networks. Networks based on these graphs reduce the Torus diameter in a factor \(\sqrt{2}\), which translates into significant performance gains for unicast traffic. In addition, they are clearly superior to Tori when managing collective communications. This paper introduces a new two-dimensional node’s labeling of the networks explored which simplifies their analysis and exploitation. In particular, it provides simple and optimal solutions to two important architectural issues: routing and broadcasting. Other implementation issues such as network folding and scalability by using hierarchical networks are also explored in this work.

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Correspondence to Carmen Martínez.

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Martínez, C., Vallejo, E., Beivide, R. et al. Dense Gaussian Networks: Suitable Topologies for On-Chip Multiprocessors. Int J Parallel Prog 34, 193–211 (2006). https://doi.org/10.1007/s10766-006-0014-1

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  • DOI: https://doi.org/10.1007/s10766-006-0014-1

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