Abstract
Reconfigurable computing offers a wide range of low cost and efficient solutions for embedded systems. The proper choice of the reconfigurable device, the granularity of its processing elements and its memory architecture highly depend on the type of application and their data flow. Existing solutions either offer fine grain FPGAs, which rely on a hardware synthesis flow and offer the maximum degree of flexibility, or coarser grain solutions, which are usually more suitable for a particular type of data flow and applications. In this paper, we present the MORPHEUS architecture, a versatile reconfigurable heterogeneous System-on-Chip targeting streaming applications. The presented architecture exploits different reconfigurable technologies at several computation granularities that efficiently address the different applications needs. In order to efficiently exploit the presented architecture, we implemented a complete software solution to map C applications to the reconfigurable architecture. In this paper, we describe the complete toolset and provide concrete use cases of the architecture.
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This work was supported in part by the European Union in the 6th R&D Framework Program (MORPHEUS IST project, number 027342).
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Grasset, A., Millet, P., Bonnot, P. et al. The MORPHEUS Heterogeneous Dynamically Reconfigurable Platform. Int J Parallel Prog 39, 328–356 (2011). https://doi.org/10.1007/s10766-010-0160-3
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DOI: https://doi.org/10.1007/s10766-010-0160-3