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Built-in Self-test and Defect Tolerance in Molecular Electronics-based Nanofabrics

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Abstract

We propose a built-in self-test (BIST) procedure for nanofabrics implemented using chemically assembled electronic nanotechnology. Several fault detection configurations are presented to target stuck-at faults, shorts, opens, and connection faults in nanoblocks and switchblocks. The detectability of multiple faults in blocks within the nanofabric is also considered. We present an adaptive recovery procedure through which we can identify defect-free nanoblocks and switchblocks in the nanofabric-under-test. The proposed BIST, recovery, and defect tolerance procedures are based on the reconfiguration of the nanofabric to achieve complete fault coverage for different types of faults. We show that a large fraction of defect-free blocks can be recovered using a small number of BIST configurations. We also present simple bounds on the recovery that can be achieved for a given defect density. Simulation results are presented for various nanofabric sizes, different defect densities, and for random and clustered defects. The proposed BIST procedure is well suited for regular and dense architectures that have high defect densities.

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Correspondence to Zhanglei Wang.

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Editor: M. Tehranipoor

A preliminary version of this paper was published in Proceeding of the IEEE International Test Conference, 2005.

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Wang, Z., Chakrabarty, K. Built-in Self-test and Defect Tolerance in Molecular Electronics-based Nanofabrics. J Electron Test 23, 145–161 (2007). https://doi.org/10.1007/s10836-006-0550-z

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