Abstract
This paper presents a new RF testing scheme based on a design-for-testability (DFT) method for measuring functional specifications of RF integrated circuits (IC). The proposed method provides the input impedance, gain, noise figure, voltage standing wave ratio (VSWR) and output signal-to-noise ratio (SNR) of a low noise amplifier (LNA). The RF test scheme is based on theoretical expressions that produce the actual RF device specifications by utilizing the output DC voltages from the DFT chip. This technique can save marginally failing chips in production testing as well as in the system, hence saving a tremendous amount of revenue from unnecessary device replacements.
This is a preview of subscription content, log in via an institution to check access.
Similar content being viewed by others
References
A.J. Bishop and A. Ivanov, “On the Testability of CMOS Feedback Amplifiers,” The Proceedings of IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1994, pp. 65–73.
K.C. Craig, S.P. Case, R.E. Neese, and C.D. DePriest, “Current and Future Trusting in Automated RF and Microwave Testing,” AUTOTESTCON ’94, IEEE Systems Readiness Technology Conference, Conference Proceedings, September 1994, pp. 183–192.
J. Dabrowski, “BiST Model for IC RF-Transceiver Front-End,” 2003 Proc. of the 18th IEEE Int. Symposium on Defect and Fault Tolerance in VLSI Systems, 2003, pp. 295–302.
G. Gonzalez, Microwave Transistor Amplifiers: Analysis and Design 2nd Edition, New Jersey: Prentice Hall, 1997.
P. Gray, P. Hurst, S. Lewis, and R. Meyer, Analog and Design of Analog Integrated Circuits 4th Edition, New York: John Wiley & Sons, Inc., 2001.
D. Lupea, U. Pursche, and H.-J. Jentschel, “RF-BIST: Loopback Spectral Signature Analysis,” IEEE Proc. of the 2003 Design, Automation and Test in Europe Conference and Exhibition, 2003, pp. 478–483.
D. Lupea, U. Pursche, and H.-J. Jentschel, “Spectral Signature Analysis-BIST for RF Front-Ends,” Advances in Radio Science, 2003 pp. 155–160.
W.A. Pleskacz, D. Kasprowicz, T. Oleszczak, and W. Kuzmicz, “CMOS Standard Cells Characterization for Defect Based Testing,” IEEE Int. Symposium on DFT in VLSI Systems, 2001, pp. 384–392.
J.-Y. Ryu, B.C. Kim, S.-T. Kim, and V. Varadarajan “Novel Defect Testing of RF Front End Using Input Matching Measurement,” 9th IEEE Int. Mixed-Signal Testing Workshop, 2003, pp. 31–34.
J.-Y. Ryu, B.C. Kim, and I. Sylla, “A New BIST Scheme for 5GHz Low Noise Amplifiers,” IEEE 9th European Test Symposium, 2004, pp. 228–233.
M. Soma, “Challenges and Approaches in Mixed Signal RF Testing,” Tenth Annual IEEE International Proceedings of ASIC Conference and Exhibit, 1997, 7-10 September 1997, pp. 33–37.
E.P. Vandamme, M.P. Schreurs, and C. van Dinther, “Improved Three-Step De-Embedding Method to Accurately Account for the Influence of Pad Parasitics in Silicon On-Wafer RF Test-Structures,’ IEEE Tran. Electronic Devices, vol. 48, no. 4, pp. 137–142, April 2001.
B.R. Veillette and G.W. Roberts, “A Built-in Self-Test Strategy for Wireless Communication Systems,” Proc. of the 1995 Int. Test Conference, 1995, pp. 930–939.
R. Voorakaranam, S. Cherubal, and A. Chatterjee, “A Signature Test Framework for Rapid Production Testing of RF Circuits,” Proc. of the 2002 Design, Automation and Test in Europe Conference and Exhibition, 2003, pp. 186–191.
Author information
Authors and Affiliations
Corresponding author
Additional information
Editor: C. Landrault
Rights and permissions
About this article
Cite this article
Ryu, JY., Kim, B.C. & Sylla, I. A Novel RF Test Scheme Based on a DFT Method. J Electron Test 22, 229–237 (2006). https://doi.org/10.1007/s10836-006-7823-4
Received:
Revised:
Published:
Issue Date:
DOI: https://doi.org/10.1007/s10836-006-7823-4