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Challenges for Semiconductor Test Engineering: A Review Paper

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Abstract

Today’s economical cycles challenge the test program generation process for semiconductors with regard to productivity, time-to-market, increasing quality requirements and manufacturing robustness, while, at the same time, the complexity of the system-on-a-chip mixed-signal integrated circuits to be tested increases significantly. Furthermore, commercial challenges in combination with competitive advantage become an important factor, not only within semiconductor manufacturing, but also within test program development. This paper provides a review of these challenges, and how they might be addressed. We first give a short introduction and background on semiconductor testing and test development with the focus on mixed-signal and systems-on-chip. This is followed by current roadmaps and considerations for test program software development. Based on the highlighted strength and weaknesses of the reviewed approaches, the authors conclude with some recommendations to address these challenges by adopting software engineering methods for the test program development process.

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Authors and Affiliations

  1. University of Ulster as PhD candidate, Faculty of Computing and Engineering, Shore Road, Newtownabbey, Co, Antrim, BT37 0QB, UK

    Stefan R. Vock

  2. University of Ulster, Engineering Research Institute, School of Engineering, Shore Road, Newtownabbey, Co, Antrim, BT37 0QB, UK

    Omar J. Escalona, Colin Turner & Frank J. Owens

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  1. Stefan R. Vock
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Vock, S.R., Escalona, O.J., Turner, C. et al. Challenges for Semiconductor Test Engineering: A Review Paper. J Electron Test 28, 365–374 (2012). https://doi.org/10.1007/s10836-011-5276-x

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