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Built-in Self Test of RF Subsystems with Integrated Detectors

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Abstract

This paper describes a built-in self test technique for RF subsystems, using low-overhead on-chip detectors to calculate circuit specifications. A novel on-chip amplitude detector has been designed and optimized for RF circuit specification test. The detector has small area overhead with a low-frequency output. A test chip was fabricated in a commercial 0.18 μm CMOS process. By using on-chip detectors in a loopback setup, both the system performance and specifications of the individual components can be accurately measured. Measurements show accurate prediction of system and component specifications.

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Acknowledgments

This work was supported in part by the National Science Foundation under Grant CCR-0325371.

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Authors and Affiliations

  1. CERC, University of Texas, Austin, TX, 78712, USA

    Chaoming Zhang, Ranjit Gharpurey & Jacob A. Abraham

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  1. Chaoming Zhang
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  2. Ranjit Gharpurey
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  3. Jacob A. Abraham
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Correspondence to Chaoming Zhang.

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Responsible Editor: D. Keezer

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Zhang, C., Gharpurey, R. & Abraham, J.A. Built-in Self Test of RF Subsystems with Integrated Detectors. J Electron Test 28, 557–569 (2012). https://doi.org/10.1007/s10836-012-5315-2

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  • DOI: https://doi.org/10.1007/s10836-012-5315-2

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