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Evaluating the Effectiveness of a Software-Based Technique Under SEEs Using FPGA-Based Fault Injection Approach

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Abstract

Nowadays, microprocessor-based system’s robustness under Single Event Effects (SEEs) represents a very important concern. A widely adopted solution to make a microprocessor-based system robust consists in modifying the application code by adding redundancy and fault tolerance capabilities. In this context, the main idea behind this paper is to evaluate a software-based technique named Optimized Embedded Signature Monitoring (OESM) using an FPGA-based fault injection technique, which is able to inject a high number of Single Event Upsets (SEUs) and Single Event Transients (SETs) in a short period of time. The obtained results demonstrated not only the increase of system’s robustness level, but also point out the remaining weak areas in the microprocessor-based system with respect to both types of SEEs.

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Correspondence to M. Portela-Garcia.

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Responsible Editor: V. Champac

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Portela-Garcia, M., Lindoso, A., Entrena, L. et al. Evaluating the Effectiveness of a Software-Based Technique Under SEEs Using FPGA-Based Fault Injection Approach. J Electron Test 28, 777–789 (2012). https://doi.org/10.1007/s10836-012-5321-4

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  • DOI: https://doi.org/10.1007/s10836-012-5321-4

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