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Hardware Obfuscation for IP Protection of DSP Applications

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Abstract

With an increasing risk of circuit piracy and intellectual property (IP), it is necessary to solve the problem of hardware security in digital signal processing (DSP) via hardware obfuscation. To obscure the circuit at a structural level, a high level of transformation techniques is used. High-level transformations (HLT) not only help in obfuscating the architecture of the circuit, it simultaneously meets the area-speed-power trade-offs. A key-based multiplexer design is proposed for the switch instance, which gives the desired output to the next node only if the configuration key is correct. A single bit change in the key will affect the whole functionality of the design. This key-based multiplexer helps to achieve functional obfuscation. As a result, two-level security is achieved. The objective of this paper is to prevent reverse engineering by structurally and functionally obfuscating the DSP circuit. Implemented and analyzed the area of the obfuscated 3-tap, 5-tap finite impulse response (FIR) filter, and obfuscated infinite impulse response (IIR) filter. Results are compared with those of the non-obfuscated filter circuit. Experimental results show that by applying the high level of transformations, the circuit gets obfuscated. Despite that, the area is reduced. The results confirm that the area of the obfuscated third-order IIR filter design is reduced by 24.56% as compared with its corresponding non-obfuscated filter.

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Authors and Affiliations

  1. Karunya Institute of Technology and Sciences, Coimbatore-641114, Tamilnadu, India

    Naveenkumar R, N.M. Sivamangai & Napolean A

  2. Accenture, Chennai, 600063, Tamilnadu, India

    G. Akashraj Nissi

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  1. Naveenkumar R
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Correspondence to Naveenkumar R.

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Communicated by C. A. Papachristou

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R, N., Sivamangai, N., A, N. et al. Hardware Obfuscation for IP Protection of DSP Applications. J Electron Test 38, 9–20 (2022). https://doi.org/10.1007/s10836-022-05984-2

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