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Applying Artificial Neural Networks to Logic Built-in Self-test: Improving Test Point Insertion

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Abstract

This study applies artificial neural networks (ANNs) to increase stuck-at and delay fault coverage of logic built-in self-test (LBIST) through test point insertion (TPI). Increasing TPI quality is essential for modern logic circuits, but the computational requirements of current TPI heuristics scale unfavorably against increasing circuit complexity, and heuristics that evaluate a TPs quality can mask the effects of delay-causing defects that are common in modern technologies. Previous studies show ANNs giving substantial benefits to a wide array of electronic design automation (EDA) problems, including design-for-test (DFT), but their application to various DFT problems is in its infancy. This study demonstrates how to train an ANN to evaluate test points (TPs) and demonstrates a substantial decrease in TPI computation time compared to existing heuristics while delivering comparable stuck-at and delay fault coverage.

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Data Availability

The datasets generated during and/or analyzed during the current study are available from the corresponding author on reasonable request.

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Authors and Affiliations

  1. Department of Electrical and Computer Engineering, Auburn University, Auburn, AL, 36849, USA

    Yang Sun & Spencer K. Millican

  2. Marvell Technology, Inc., Santa Clara, CA, 95054, USA

    Yang Sun

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  1. Yang Sun
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  2. Spencer K. Millican
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Correspondence to Spencer K. Millican.

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Sun, Y., Millican, S.K. Applying Artificial Neural Networks to Logic Built-in Self-test: Improving Test Point Insertion. J Electron Test 38, 339–352 (2022). https://doi.org/10.1007/s10836-022-06016-9

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  • DOI: https://doi.org/10.1007/s10836-022-06016-9

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