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Types and associated type families for hardware simulation and synthesis

The internals and externals of Kansas Lava

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Higher-Order and Symbolic Computation

Abstract

In this article we overview the design and implementation of the second generation of Kansas Lava. Driven by the needs and experiences of implementing telemetry decoders and other circuits, we have made a number of improvements to both the external API and the internal representations used. We have retained our dual shallow/deep representation of signals in general, but now have a number of externally visible abstractions for combinatorial and sequential circuits, and enabled signals. We introduce these abstractions, as well as our abstractions for reading and writing memory. Internally, we found the need to represent unknown values inside our circuits, so we made aggressive use of associated type families to lift our values to allow unknowns, in a principled and regular way. We discuss this design decision, how it unfortunately complicates the internals of Kansas Lava, and how we mitigate this complexity. Finally, when connecting Kansas Lava to the real world, the standardized idiom of using named input and output ports is provided by Kansas Lava using a new monad, called Fabric. We present the design of this Fabric monad, and illustrate its use in a small but complete example.

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Acknowledgements

We would like to thank the TFP 2010 referees for their useful feedback, both on this article, and on the earlier TFP version of this article. We would also like to thank Neil Sculthorpe for his detailed comments.

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Authors and Affiliations

  1. The University of Kansas, 2001 Eaton Hall, 520 West 15th Street, Lawrence, KS, 66045-7621, USA

    Andy Gill, Tristan Bull, Andrew Farmer, Garrin Kimmell & Ed Komp

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  1. Andy Gill
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  2. Tristan Bull
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  3. Andrew Farmer
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  4. Garrin Kimmell
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  5. Ed Komp
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Corresponding author

Correspondence to Andy Gill.

Appendices

Appendix A: VHDL generated for interactive nand gate circuit

figure ao

Appendix B: Spartan3E starter board simulator running nand gate circuit

figure ap

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Gill, A., Bull, T., Farmer, A. et al. Types and associated type families for hardware simulation and synthesis. Higher-Order Symb Comput 25, 255–274 (2012). https://doi.org/10.1007/s10990-013-9098-7

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